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Message-ID: <20120109142125.GA1854@richard-laptop>
Date: Mon, 9 Jan 2012 22:21:28 +0800
From: Richard Zhao <richard.zhao@...aro.org>
To: Russell King - ARM Linux <linux@....linux.org.uk>
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
patches@...aro.org, vinod.koul@...el.com, eric.miao@...aro.org,
kernel@...gutronix.de, dan.j.williams@...el.com,
shawn.guo@...aro.org
Subject: Re: [PATCH v4 2/2] dma/imx-sdma: convert _raw_readl/_raw_writel to
readl/writel
On Mon, Jan 09, 2012 at 11:51:43AM +0000, Russell King - ARM Linux wrote:
> On Sun, Jan 08, 2012 at 10:44:22PM +0800, Richard Zhao wrote:
> > readl/writel is more genric. And if CONFIG_ARM_DMA_MEM_BUFFERABLE,
> > they includes necessary memory barriers.
>
> In a DMA engine driver, you need to use the barrier accessors when:
>
> 1. You finally enable the DMA engine to perform a transfer.
> The included barrier ensures that writes to the descriptors are visible
> to the DMA engine.
>
> 2. You read from a status register before examining the descriptors.
> This ensures that the descriptor accesses won't be ordered before the
> status register read.
>
> Provided other accesses are within the same 1K region, the remainder of
> them do not have to be the strictly ordered accessors, and you can use
> the _relaxed variants (but only in ARM specific drivers.)
>
> So, if your DMA engine has a control register, and a descriptor pointer
> register, you can write the descriptor pointer register with a
> writel_relaxed(). When you write the control register to enable the
> transfer, use writel() to ensure there's a barrier so the descriptors
> are visible.
Thanks very much for teaching. I understand now what relaxed means here.
I'll change all register access to _relaxed version except in function
sdma_enable_channel.
Freescale power pc also has sdma, I guess we can use _relaxed till they
tend to use the same driver ( I don't know when).
Thanks
Richard
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