linux-kernel - RE: [RFC PATCH v3 2/5] pinctrl: add dt binding support for pinmux mappings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Thu, 12 Jan 2012 07:40:40 +0000
From:	Dong Aisheng-B29396 <B29396@...escale.com>
To:	Shawn Guo <shawn.guo@...aro.org>,
	Stephen Warren <swarren@...dia.com>
CC:	Dong Aisheng <dongas86@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linus.walleij@...ricsson.com" <linus.walleij@...ricsson.com>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	"cjb@...top.org" <cjb@...top.org>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	"Simon Glass (sjg@...omium.org)" <sjg@...omium.org>,
	Richard Zhao <richard.zhao@...aro.org>
Subject: RE: [RFC PATCH v3 2/5] pinctrl: add dt binding support for pinmux
 mappings

...
> > * The enumerations above should be purely at the level the HW exposes,
> > i.e. if a UART uses 4 signals (RX, TX, CTS, RTS), and the SoC
> > configures muxing at a per-pin level, and 6 pins exist which can have
> > various UART signals mux'd on to them, there should be a "muxable
> > entity" enumeration for each of the 6 pins, not an enumeration for
> > each possible combination of assignments of signals to pins, since in
> > general that number could be extremely large as Richard Zao points out
> > in his email that was sent right after yours.
> >
> Speaking of the model, yes, it's true.  But coming to the practical
> implementation, we may need compromise on whether we need to do a full
> enumeration.
> 
> > * pinmux properties in device drivers should list the muxable entities
> > that they use, and the mux function for each of them.
> >
> Following on the example above, we will need something below in SD node to
> specify each pin and corresponding function selection.
> 
>         usdhc@...94000 { /* uSDHC2 */
>                 #pinmux-cells = <2>;
>                 // The second cell specify the index of the desired function of
> given pin
>                 pinmux = < &sd2_dat1 0
>                            &sd2_dat2 0
>                            ...        >;
>                 status = "okay";
>         };
> 
> IMO, it's not nice for pinctrl client devices.  Though it's true that the
> muxable entity is pin, what the client device really cares is its pingroup.  We
> should define the pingroup rather than pin for client device to refer to with a
> phandle.  This is just like that pinctrl subsystem api pinmux_get/enable operate
> on a pingroup as an interface to client device driver, no matter the muxable
> entity at HW level is a pin or a group.
> 
+1
It's just like what the current pinctrl subsystem does:
the device says "I'm using this function and this pin group, please enable!"
But no pins are specified.

Regards
Dong Aisheng

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/