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Message-ID: <20120114054043.GA3073@S2101-09.ap.freescale.net>
Date: Sat, 14 Jan 2012 13:40:47 +0800
From: Shawn Guo <shawn.guo@...aro.org>
To: "Turquette, Mike" <mturquette@...com>
Cc: Grant Likely <grant.likely@...retlab.ca>,
Jamie Iles <jamie@...ieiles.com>,
Sascha Hauer <kernel@...gutronix.de>,
devicetree-discuss@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
Rob Herring <rob.herring@...xeda.com>
Subject: Re: [RFC v2 4/9] of: add clock providers
On Fri, Jan 13, 2012 at 08:30:30PM -0800, Turquette, Mike wrote:
...
> I had envisioned fixed clocks as being clocks whose rates could never
> change; obviously this is mostly useful for root clocks like
> oscillators and whatnot.
>
> There is nothing wrong with using fixed clock for sgtl5000-sys-mclk,
> but it's rate *can* change if it's parent rate ever changes. This may
> be very unlikely on your platform, in which case again it is OK to use
> fixed clock here if you want to.
>
> However... I'm inclined to say that sgtl5000-sys-mclk is good
> candidate for a dummy clock: it follows it's parent rate, doesn't
> gate, doesn't divide it's parent rate, only has one input. There
> isn't a common dummy clock in the v4 patches, but there is in v5. The
> key difference between the fixed rate clock and the dummy clock is
> that the dummy clock looks at clk->parent->rate in it's .get_rate,
> whereas a fixed rate clock will have it's rate cached in struct
> clk_fixed.
>
> Thoughts?
>
I would say this modeling looks all sane to me, except both the
fixed-clock soc-26m-clk and dummy-clock sgtl5000-sys-mclk in this
case have a gate which is controlled by gpio.
--
Regards,
Shawn
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