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Message-ID: <74CDBE0F657A3D45AFBB94109FB122FF17801D22FA@HQMAIL01.nvidia.com>
Date:	Tue, 17 Jan 2012 11:32:37 -0800
From:	Stephen Warren <swarren@...dia.com>
To:	Shawn Guo <shawn.guo@...aro.org>,
	Dong Aisheng-B29396 <B29396@...escale.com>
CC:	"linus.walleij@...ricsson.com" <linus.walleij@...ricsson.com>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	"cjb@...top.org" <cjb@...top.org>,
	"Simon Glass (sjg@...omium.org)" <sjg@...omium.org>,
	Dong Aisheng <dongas86@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>
Subject: RE: Pinmux bindings proposal

Shawn Guo wrote at Tuesday, January 17, 2012 7:13 AM:
> On Tue, Jan 17, 2012 at 09:46:42AM +0000, Dong Aisheng-B29396 wrote:
> ...
> > I guess Stephen's idea is to retrieving the function name and group name
> > From the pinctrl driver since Tagre prefers to define those things in driver
> > Rather than in board file or soc.dts file.
> > But it does not fit for IMX since we define it in soc.dts.
>
> Hmm, when he came up with this proposal and said it should work for
> Tegra, I assume he plans to move those from Tegra pinctrl driver into
> device tree.  Stephen?

I plan to have the following:

tegra20.dtsi:

A regular device node for the pin controller, listing just the basic
device tree properties: "compatible" and "regs".

${board}.dts:

Each device node lists its pin mux/config setup using the bindings we
decide upon.

drivers/pinctrl/pinctrl-tegra20.c:

Static tables listing all pins, pin groups, mux functions, and pin
configuration options that Tegra supports.

-- 
nvpublic

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