linux-kernel - [tip:x86/urgent] x86/amd: Add missing feature flag for fam15h models 10h-1fh processors

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Message-ID: <tip-652847aa449cfe364d40018849223f57f31a38e2@git.kernel.org>
Date:	Thu, 26 Jan 2012 05:41:05 -0800
From:	tip-bot for Andreas Herrmann <andreas.herrmann3@....com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...hat.com,
	andreas.herrmann3@....com, tglx@...utronix.de, mingo@...e.hu
Subject: [tip:x86/urgent] x86/amd:
  Add missing feature flag for fam15h models 10h-1fh processors

Commit-ID:  652847aa449cfe364d40018849223f57f31a38e2
Gitweb:     http://git.kernel.org/tip/652847aa449cfe364d40018849223f57f31a38e2
Author:     Andreas Herrmann <andreas.herrmann3@....com>
AuthorDate: Fri, 20 Jan 2012 17:38:23 +0100
Committer:  Ingo Molnar <mingo@...e.hu>
CommitDate: Thu, 26 Jan 2012 12:06:38 +0100

x86/amd: Add missing feature flag for fam15h models 10h-1fh processors

That is the last one missing for those CPUs.

Others were recently added with commits

 fb215366b3c7320ac25dca766a0152df16534932
 (KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

 commit 969df4b82904a30fef19a67398a0c854d223ea67
 (x86: Report cpb and eff_freq_ro flags correctly)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@....com>
Link: http://lkml.kernel.org/r/20120120163823.GC24508@alberich.amd.com
Signed-off-by: Ingo Molnar <mingo@...e.hu>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 17c5d4b..8d67d42 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -159,6 +159,7 @@
 #define X86_FEATURE_WDT		(6*32+13) /* Watchdog timer */
 #define X86_FEATURE_LWP		(6*32+15) /* Light Weight Profiling */
 #define X86_FEATURE_FMA4	(6*32+16) /* 4 operands MAC instructions */
+#define X86_FEATURE_TCE		(6*32+17) /* translation cache extension */
 #define X86_FEATURE_NODEID_MSR	(6*32+19) /* NodeId MSR */
 #define X86_FEATURE_TBM		(6*32+21) /* trailing bit manipulations */
 #define X86_FEATURE_TOPOEXT	(6*32+22) /* topology extensions CPUID leafs */
--
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