linux-kernel - Re: [PATCH] amba-pl011: clear previous interrupts before request

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [day] [month] [year] [list]

Message-ID: <CAOAMb1APdCnB8hDHo6sTP-eaws8c2FB2Bt0mJX2B3+9AK8x2Zw@mail.gmail.com>
Date:	Tue, 31 Jan 2012 16:27:41 +0900
From:	Chanho Min <chanho0207@...il.com>
To:	Shreshtha Kumar Sahu <shreshthakumar.sahu@...ricsson.com>
Cc:	Linus Walleij <linus.walleij@...aro.org>,
	Russell King <rmk@....linux.org.uk>,
	Alan Cox <alan@...rguk.ukuu.org.uk>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] amba-pl011: clear previous interrupts before request_irq

> Sorry for late reply and missing sign-off.
> In the setup where console is disabled and logs are diverted to buffer, it is
> observed that, continuous uart interrupts are coming. Even before IMSC
> (Interrupt mask set/clear register) is enabled for TX or RX interrupts,
> it is seen that interrupt handler getting called just after request_irq.
> It was found that this situation happens when RIS (raw interrupt register)
> has some pending interrupts (e.g. RI, CTS, DCD, RX etc. but IMO RX is main)
> when control gets transferred to kernel from bootloader. This refers that
> GIC (global interrupt controller) is providing interrupt even if interrupts
> for UART are masked/disabled in IMSC register.
> In this state problem elivated when cpu is looping in interrupt handler
> because of Rx interrupt set but Rx fifo is empty (hence rx_char is simply
> returning). How UART goes in to this state is still not completely
> understood.
Hi,
This is my analsys.
RXFE is set by 'writew(0, uap->port.membase + uap->lcrh_rx)'
UART can not get any data from DR because of the below break condtion.
pl011_fifo_to_tty
 while (max_count--) {
   if (status & UART01x_FR_RXFE)
	break;
Rx interrupt is never cleared. cpu is looping in ISR.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/