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Message-ID: <20120131115855.5861bad7@pyramind.ukuu.org.uk>
Date: Tue, 31 Jan 2012 11:58:55 +0000
From: Alan Cox <alan@...rguk.ukuu.org.uk>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Hitoshi Mitake <h.mitake@...il.com>, Ingo Molnar <mingo@...e.hu>,
Matthew Wilcox <matthew.r.wilcox@...el.com>,
Roland Dreier <roland@...estorage.com>,
Andrew Morton <akpm@...ux-foundation.org>,
James Bottomley <James.Bottomley@...allels.com>,
linux-kernel@...r.kernel.org, hpa@...ux.intel.com
Subject: Re: [PATCH] NVMe: Fix compilation on architecturs without
readq/writeq
> u64 val;
> val = readl(addr);
> val |= readl(addr+4) << 32;
>
> is well-defined and must read the low word first - both at the C level
> *and* at the CPU level. Anything else would be a bug in the
> architecture "readl()" implementation or the hardware.
That doesn't make the access atomic to hardware however as a true 64bit
readq/writeq would be ?
It seems to me the two are not quite the same semantically
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