linux-kernel - Re: [PATCH] NVMe: Fix compilation on architecturs without readq/writeq

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Message-ID: <CAMO-S2hCjvcDHheVETr5=+0Ks+G+NyYvr3mnxUV8jQSKzEgVGA@mail.gmail.com>
Date:	Sun, 5 Feb 2012 00:34:42 +0900
From:	Hitoshi Mitake <h.mitake@...il.com>
To:	James Bottomley <jbottomley@...allels.com>
Cc:	Linus Torvalds <torvalds@...ux-foundation.org>,
	Ingo Molnar <mingo@...e.hu>,
	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Matthew Wilcox <matthew.r.wilcox@...el.com>,
	Roland Dreier <roland@...estorage.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"hpa@...ux.intel.com" <hpa@...ux.intel.com>
Subject: Re: [PATCH] NVMe: Fix compilation on architecturs without readq/writeq

On Thu, Feb 2, 2012 at 10:05, James Bottomley <jbottomley@...allels.com> wrote:
> On Wed, 2012-02-01 at 15:35 -0800, Linus Torvalds wrote:
>> On Tue, Jan 31, 2012 at 4:23 AM, Ingo Molnar <mingo@...e.hu> wrote:
>> >
>> > non-atomic sounds good to me too.
>>
>> You both apparently missed the related discussion that some devices
>> really do care about order, even if they don't care about atomicity.
>>
>> So we'd actually have two versions of the header file, one
>> little-endian, and one big-endian. Then the driver that knows it
>> doesn't need the atomic 'readq()' that is always defined, but wants a
>> low-bytes-first version would just do
>>
>>    #include <linux/io64-little-endian.h>
>>
>> (or "big-endian" if it wants to read/write high bits first). Most
>> drivers probably don't care, but apparently NVMe does.
>
> And this was about the point I concluded last time that it simply wasn't
> worth it with the number of different possibilities for the primitives
> and trying to come up with a sensible naming scheme ... it's just easier
> to open code because then you get exactly what you meant.
>
> Incidentally, the last time this came up was with mpt fusion: for a
> write to a 64 bit register, it didn't care about order, but it did care
> about interleaving as in if you write one half of a 64 bit register and
> then write to another register, the 64 bit register effectively gets
> written with zeros in the part you didn't write to, so we had to put a
> spin lock in the open coded writeb/w/l/q() to make sure the card didn't
> get interleaved writes.
>
> James
>

As you say, readq/writeq without any description about the semantics
of atomicity will cause confusion in such a case.

But new plan for non-atomic readq/writeq is defining non-atomic readq/writeq
in the header file like asm-generic/io-nonatomic-hi-lo.h, and the file name
is a good documentation for the description.

The drivers which use readq/writeq without the line like
#include <asm-generic/io-nonatomic-hi-lo.h>
will cause compile error in the 32-bit environment.

-- 
Hitoshi Mitake
h.mitake@...il.com
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