linux-kernel - Re: [PATCH] perf: fix assertion failure in x86_pmu

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Message-ID: <CABPqkBRLEH+r61Qi+xZj6uAyJ=Zd-qK7tyM7ysrPR7+CEtW0JA@mail.gmail.com>
Date:	Tue, 7 Feb 2012 12:07:13 +0100
From:	Stephane Eranian <eranian@...gle.com>
To:	Ingo Molnar <mingo@...e.hu>
Cc:	Eric Dumazet <eric.dumazet@...il.com>,
	linux-kernel@...r.kernel.org, peterz@...radead.org,
	markus@...ppelsdorf.de, paulus@...ba.org
Subject: Re: [PATCH] perf: fix assertion failure in x86_pmu_start()

On Tue, Feb 7, 2012 at 11:49 AM, Ingo Molnar <mingo@...e.hu> wrote:
>
> * Stephane Eranian <eranian@...gle.com> wrote:
>
>> On Tue, Feb 7, 2012 at 11:25 AM, Eric Dumazet <eric.dumazet@...il.com> wrote:
>> > Le mardi 07 février 2012 à 09:41 +0100, Ingo Molnar a écrit :
>> >
>> >> Were these messages introduced by:
>> >>
>> >>  e050e3f0a71b: perf: Fix broken interrupt rate throttling
>> >>
>> >> as well?
>> >>
>> >> In any case I'm holding off on applying the patch before this is
>> >> resolved.
>> >
>> > Reverting e050e3f0a71b solves all my problems, no more warnings.
>> >
>> > $ perf record -a -g hackbench 10 thread 4000
>> > Running with 10*40 (== 400) tasks.
>> > Time: 13.181
>> > [ perf record: Woken up 59 times to write data ]
>> > [ perf record: Captured and wrote 16.874 MB perf.data (~737228 samples)
>> > ]
>> >
>> > $ perf record -a -g hackbench 10 thread 4000
>> > Running with 10*40 (== 400) tasks.
>> > Time: 13.124
>> > [ perf record: Woken up 61 times to write data ]
>> > [ perf record: Captured and wrote 16.533 MB perf.data (~722349 samples)
>> > ]
>> >
>>
>> What system is this running on?
>> The problem is that without e050e3f0a71b interrupt throttling does not work.
>
> Fixes are not supposed to regress, so if we cannot resolve this
> within a couple of days we'll have to revert e050e3f0a71b and
> re-try it later.
>
I suspect in the case of Eric's system, the fact that we do not
stop the PMU when adjusting frequency anymore may expose a side-effect
of his BIOS "sharing" the PMU with perf_events. But the config value reported
by the kernel does not include the INT bit, i.e., the counter does not generate
interrupts on overflow, so it should not conflict.

>> I think the key difference is that without the patch,
>> frequency adjustment happens with the PMU completely stopped
>> whereas with my patch it does not. I suspect this may be the
>> issue. I can rework the patch to disable the PMU completely
>> while retaining the same workflow.
>
> Would be nice to try that.
>
> Thanks,
>
>        Ingo
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