linux-kernel - Re: [PATCH] genirq: Fix race condition in ONESHOT irq handler

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Message-ID: <20275.34409.978854.416870@ipc1.ka-ro>
Date:	Thu, 9 Feb 2012 09:40:09 +0100
From:	Lothar Waßmann <LW@...O-electronics.de>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	linux-kernel@...r.kernel.org, Lars-Peter Clausen <lars@...afoo.de>,
	Yong Zhang <yong.zhang0@...il.com>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] genirq: Fix race condition in ONESHOT irq handler

Hi,

Thomas Gleixner writes:
> On Wed, 8 Feb 2012, Lothar Waßmann wrote:
> > > > The problem arises also with interrupt controllers that latch a level
> > > > triggered IRQ until it is acknowledged (like the i.MX28 does).
> > > > In this case the IRQ status bit will remain asserted after the
> > > > soft-irq finishes and retrigger the interrupt while the interrupt line
> > > > is already deasserted.
> > > 
> > > This does not make sense. We acknowledge interrupts via mask_ack_irq()
> > > right on entry of handle_level_irq(). So either the interrupt
> > > 
> > That's right. But at that point the IRQ line is still asserted and
> > since it is a level IRQ this will not actually clear the interrupt
> > status bit. Normally the IRQ status bit would self-clear when the IRQ
> > line is being deasserted (in this case by removing the finger from the
> > touch panel). But the i.MX28 leaves the IRQ status bit set and it
> > takes another write to the IRQ status register to remove the bogus IRQ
> > status.
> 
> So the question is whether the imx irq chip implementation should
> write to the status register on unmask for level type irqs to avoid
> spurious interrupts being generated in the first place. This is not
> only an optimization for threaded interrupts, afaict this spurious
> effect should happen with non threaded interrupts as well.
> 
> Did my patch work for you ?
> 
Sorry, I couldn't test it earlier. Yes, it works.

Lothar Waßmann
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