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Date:	Thu, 9 Feb 2012 11:58:21 +0100
From:	Geert Uytterhoeven <geert@...ux-m68k.org>
To:	Linus Torvalds <torvalds@...ux-foundation.org>
Cc:	Hitoshi Mitake <h.mitake@...il.com>,
	Alan Cox <alan@...rguk.ukuu.org.uk>,
	Roland Dreier <roland@...estorage.com>,
	Matthew Garrett <mjg@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	James Bottomley <James.Bottomley@...allels.com>,
	Ravi Anand <ravi.anand@...gic.com>,
	James Bottomley <jbottomley@...allels.com>,
	Len Brown <lenb@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Uhlenkott <juhlenko@...mai.com>,
	Kashyap Desai <Kashyap.Desai@....com>,
	linux-kernel@...r.kernel.org,
	Vikas Chaudhary <vikas.chaudhary@...gic.com>,
	Matthew Wilcox <matthew.r.wilcox@...el.com>, mingo@...e.hu
Subject: Re: [PATCH] asm-generic: architecture independent readq/writeq for
 32bit environment

On Wed, Feb 8, 2012 at 17:28, Linus Torvalds
<torvalds@...ux-foundation.org> wrote:
> On Wed, Feb 8, 2012 at 8:14 AM, Hitoshi Mitake <h.mitake@...il.com> wrote:
>> On Tue, Feb 7, 2012 at 12:56, Linus Torvalds
>> <torvalds@...ux-foundation.org> wrote:
>>>
>>> On Feb 6, 2012 6:47 PM, "Hitoshi Mitake" <h.mitake@...il.com> wrote:
>>>>
>>>>  All of them are endian aware
>>>
>>> I think that part is wrong.
>>>
>>> Pci is little-endian, so readl and writel are always already little-endian.
>>> Trying to make readq be endian-aware is wrong.
>>
>> Is every memory area which can be read/written by read[wl]/write[wl]
>> always little-endian?
>>
>> If so, of course I have to eliminate the big-endian version.
>> But I'm not sure about this point because the new readq/writeq is
>> in asm-generic which is used by every archs, so I'd like to ask you about it.
>
> Yes, PCI is always little-endian everywhere.
>
> Now, some architectures may have some unified IO space where parts of
> it is PCI, and other parts are programmed the same way but is for some
> other bus, but the PCI part will always be little-endian because
> otherwise no common driver would ever work. But those non-PCI things
> would never be relevant for an emulated readq/writeq anyway, and would
> need some bus-specific accessor functions.

IIRC, some crazy hardware manufacturers did swizzle PCI busses in hardware.
So doing a PCI "little endian" 32-bit read must be performed using a native
(big endian) 32-bit read. And it causes more headaches for 16-bit accesses.

Of course this must all be hidden in your readX() implementations, to make the
common drivers work.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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