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Message-ID: <CAErSpo7oxTDdB3CJZuG+=xsZanOc76xdnMYDPsfaP-CSsmGxiQ@mail.gmail.com>
Date:	Fri, 10 Feb 2012 14:11:58 -0800
From:	Bjorn Helgaas <bhelgaas@...gle.com>
To:	Yinghai Lu <yinghai@...nel.org>
Cc:	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Ram Pai <linuxram@...ibm.com>,
	Dominik Brodowski <linux@...inikbrodowski.net>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	Rogério Brito <rbrito@....usp.br>
Subject: Re: [PATCH 3/9] PCI: Disable cardbus bridge MEM1 pref CTL

On Fri, Feb 10, 2012 at 12:54 PM, Yinghai Lu <yinghai@...nel.org> wrote:
> On Fri, Feb 10, 2012 at 12:46 PM, Jesse Barnes <jbarnes@...tuousgeek.org> wrote:
>> On Sat,  4 Feb 2012 22:55:02 -0800
>> Yinghai Lu <yinghai@...nel.org> wrote:
>>
>>> Some BIOS enable both pref for MEM0 and MEM1.
>>>
>>> but we assume MEM1 is non-pref...
>>>
>>> Signed-off-by: Yinghai Lu <yinghai@...nel.org>
>>> ---
>>>  drivers/pci/setup-bus.c |    8 ++++++++
>>>  1 files changed, 8 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
>>> index 090217a..d5897c3 100644
>>> --- a/drivers/pci/setup-bus.c
>>> +++ b/drivers/pci/setup-bus.c
>>> @@ -914,6 +914,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
>>>       if (realloc_head)
>>>               add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);
>>>
>>> +     /* MEM1 must not be pref mmio */
>>> +     pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
>>> +     if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
>>> +             ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
>>> +             pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
>>> +             pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
>>> +     }
>>> +
>>>       /*
>>>        * Check whether prefetchable memory is supported
>>>        * by this bridge.
>>
>> Does this actually fix any bugs?
>
> at least, one of laptop have this problem.

Rogério Brito's Clevo M5X0JE laptop seems to boot with both CardBus
mem apertures set to prefetchable.  I think there's evidence of this
in one of the video boot logs Rogério mentioned in this thread:
https://lkml.org/lkml/2012/1/6/343 because I noticed the same thing
and fixed a nearby bug in lspci.

I looked for it, but didn't find it.  I think it would be useful if
Yinghai could locate it, transcribe it into a bugzilla report, and
mention the bugzilla URL in this commit log.

I think Rogério did try the patch, but I don't know whether he
observed different behavior.  I think it *does* fix a bug; it's just
that his box has more serious problems that we haven't figured out
yet.

Bjorn
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