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Message-ID: <4F3EC931.2080106@linux.intel.com>
Date: Fri, 17 Feb 2012 13:40:01 -0800
From: "H. Peter Anvin" <hpa@...ux.intel.com>
To: Peter Zijlstra <a.p.zijlstra@...llo.nl>
CC: Maarten Lankhorst <m.b.lankhorst@...il.com>, x86@...nel.org,
LKML <linux-kernel@...r.kernel.org>,
Stephane Eranian <eranian@...gle.com>
Subject: Re: perf, x86: Disable PEBS on SandyBridge chips
On 02/17/2012 07:12 AM, Peter Zijlstra wrote:
> On Fri, 2012-02-17 at 13:39 +0100, Maarten Lankhorst wrote:
>> Hey Peter,
>>
>> Why is PEBS disabled? If I look at the intel_clovertown_quirks I can see
>> why it's disabled for that cpu, but the sandy bridge one lacks any kind
>> of clarification or information on why, or how I can learn more.
>
> hpa, could you get the official Intel answer on this?
*Where* is PEBS disabled?
-hpa
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