linux-kernel - Re: [microblaze-linux] [PATCH 2/5] microblaze: s/#if[!] CONFIG/#if[n]def CONFIG/

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CACPZLaX79gaBR60tfQH+zeEX22RpJYwjvWzGU40t0hy1_iF-BQ@mail.gmail.com>
Date:	Tue, 21 Feb 2012 09:53:50 +1000
From:	John Williams <john.williams@...alogix.com>
To:	Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:	Jiri Kosina <trivial@...nel.org>,
	microblaze-uclinux@...e.uq.edu.au, linux-kernel@...r.kernel.org
Subject: Re: [microblaze-linux] [PATCH 2/5] microblaze: s/#if[!]
 CONFIG/#if[n]def CONFIG/

Hi Geert,

On Mon, Feb 20, 2012 at 9:59 PM, Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
> On Mon, Feb 20, 2012 at 01:27, John Williams
> <john.williams@...alogix.com> wrote:
>> NACK - please see comments below
>>
>> On Mon, Feb 20, 2012 at 1:11 AM, Geert Uytterhoeven
>> <geert@...ux-m68k.org> wrote:
>>> Signed-off-by: Geert Uytterhoeven <geert@...ux-m68k.org>
>>> Cc: Michal Simek <monstr@...str.eu>
>>> Cc: microblaze-uclinux@...e.uq.edu.au
>>> ---
>>>  arch/microblaze/include/asm/exceptions.h |    2 +-
>>>  arch/microblaze/include/asm/irqflags.h   |    2 +-
>>>  arch/microblaze/kernel/entry-nommu.S     |    2 +-
>>>  arch/microblaze/kernel/entry.S           |    4 ++--
>>>  arch/microblaze/kernel/setup.c           |    4 ++--
>>>  5 files changed, 7 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h
>>> index e6a8dde..48c197b 100644
>>> --- a/arch/microblaze/include/asm/exceptions.h
>>> +++ b/arch/microblaze/include/asm/exceptions.h
>>> @@ -25,7 +25,7 @@
>>>  /* Define MSR enable bit for HW exceptions */
>>>  #define HWEX_MSR_BIT (1 << 8)
>>>
>>> -#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
>>> +#ifdef CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
>>
>> We actually care about the value of this one - it is always defined,
>> but is either 0 or 1 depending upon the presence or absence of this
>> feature in the target CPU.
>>
>> These CPU feature-related configs are defined in
>> arch/microblaze/platform/generic/Kconfig.auto
>>
>> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/microblaze/platform/generic/Kconfig.auto;h=25a6f019e94d5d9a1c884dfef9e906435685f980;hb=HEAD
>>
>> not as bools, but as integers.  Kconfig.auto is actually a placeholder
>> for a design file which is emitted from the MicroBlaze CPU / SoC
>> design tool flow and copied into place by the user.
>>
>> In my view these should remain integers rather than booleans for a
>> couple of reasons:
>>  * breakage for all current users
>>  * MicroBlaze is an evolving architecture, there are other cases of
>> seemingly boolean HW parametesr growing to become integers, such as
>> the USE_FPU option.  Once upon a time it was yes/no, now there's 2
>> different flavours of FPU as well as 'none'.  MSR is just as likely to
>> change in future.
>>
>>> -#if CONFIG_MANUAL_RESET_VECTOR
>>> +#ifdef CONFIG_MANUAL_RESET_VECTOR
>>
>> This guy is also always defined (Kconfig 'hex' type), we just need to
>> do something different for a non-zero value.
>
> Sorry, I missed these are not bool values.

No problem.

> To avoid this from happening again, perhaps it's a good idea to
> explicitly write e.g.
>
> #if CONFIG_MANUAL_RESET_VECTOR != 0
>
> like is done for other int config values?

Yes I think that's probably worth doing.

Thanks,

John
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/