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Message-ID: <a6f20f7d-8af4-4020-ba8d-c1f90512138b@zimbra>
Date: Tue, 21 Feb 2012 11:25:13 -0600 (CST)
From: Aaron Sierra <asierra@...-inc.com>
To: Guenter Roeck <guenter@...ck-us.net>
Cc: Peter Tyser <ptyser@...-inc.com>,
Grant Likely <grant.likely@...retlab.ca>,
LKML <linux-kernel@...r.kernel.org>,
Jean Delvare <khali@...ux-fr.org>
Subject: Re: [PATCH V5 2/3] gpio: Add support for Intel ICHx/3100/Series[56] GPIO
> >+static int ich6_gpio_get(struct gpio_chip *chip, unsigned nr)
> >+{
> >+ unsigned long flags;
> >+ u32 data;
> >+
> >+ /*
> >+ * GPI 0 - 15 need to be read from the power management
> >registers on
> >+ * a ICH6/3100 bridge.
> >+ */
> >+ if (nr < 16 && ichx_priv.pm_base) {
> >+ spin_lock_irqsave(&ichx_priv.lock, flags);
> >+
> >+ /* GPI 0 - 15 are latched, write 1 to clear*/
> >+ ICHX_WRITE(1 << (16 + nr), 0, ichx_priv.pm_base);
> >+ data = ICHX_READ(0, ichx_priv.pm_base);
> >+
> >+ spin_unlock_irqrestore(&ichx_priv.lock, flags);
> >+
> >+ return (data >> 16) & (1 << nr) ? 1 : 0;
> >+ } else {
>
>
> unless I am missing something, this still does not address the error
> case where pm_base is not set because of an ACPI conflict (.uses_gpe0
> is true, but .pm_base is NULL).
>
> Not sure what to do in that case, but simply calling ichx_gpio_get
> doesn't seem to be the correct solution.
Guenter,
You're right. That doesn't do what I'd intended, but this should do the
trick:
...
* a ICH6/3100 bridge.
*/
if (nr < 16) {
if (!ichx_priv.pm_base)
return -ENXIO;
...
Any other concerns?
> >+ return ichx_gpio_get(chip, nr);
> >+ }
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