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Message-ID: <74CDBE0F657A3D45AFBB94109FB122FF17BD8BCACE@HQMAIL01.nvidia.com>
Date: Thu, 23 Feb 2012 13:13:13 -0800
From: Stephen Warren <swarren@...dia.com>
To: Linus Walleij <linus.walleij@...aro.org>
CC: Linus Walleij <linus.walleij@...ricsson.com>,
"B29396@...escale.com" <B29396@...escale.com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"dongas86@...il.com" <dongas86@...il.com>,
"shawn.guo@...aro.org" <shawn.guo@...aro.org>,
"thomas.abraham@...aro.org" <thomas.abraham@...aro.org>,
"tony@...mide.com" <tony@...mide.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 20/20] pinctrl: Enhance mapping table to support pin
config operations
Linus Walleij wrote at Wednesday, February 22, 2012 11:09 PM:
> On Mon, Feb 20, 2012 at 7:46 AM, Stephen Warren <swarren@...dia.com> wrote:
> > The pinctrl mapping table can now contain entries to:
> > * Set the mux function of a pin group
> > * Apply a set of pin config options to a pin or a group
> >
> > This allows pinctrl_select_state() to apply pin configs settings as well
> > as mux settings.
> >
> > Signed-off-by: Stephen Warren <swarren@...dia.com>
...
> > /* First sanity check the new mapping */
> > for (i = 0; i < num_maps; i++) {
> > + if (!maps[i].dev_name) {
> > + pr_err("failed to register map %s (%d): no device given\n",
> > + maps[i].name, i);
> > + return -EINVAL;
> > + }
> > +
>
> Hm should this not be done earlier in the patch series?
This patch isn't adding that check, it's just moving it a little earlier
in the same block.
The old code checked everything required for "MUX_GROUP" type mapping
table entries, but in the new code not all those same checks exist for
every type of mapping entry. I just moved all the common stuff to the
top of the block in one common place, followed by the stuff that varies.
So, I think that chunk is OK.
--
nvpublic
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