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Date:	Thu, 1 Mar 2012 12:40:23 +0100
From:	Borislav Petkov <bp@...64.org>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
Cc:	Mauro Carvalho Chehab <mchehab@...hat.com>,
	Tony Luck <tony.luck@...el.com>, Ingo Molnar <mingo@...e.hu>,
	EDAC devel <linux-edac@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/3] mce: Add a msg string to the MCE tracepoint

On Thu, Mar 01, 2012 at 11:23:22AM +0900, Hidetoshi Seto wrote:
> (2012/02/29 22:37), Borislav Petkov wrote:
> > On Wed, Feb 29, 2012 at 10:05:53AM -0300, Mauro Carvalho Chehab wrote:
> >> Em 29-02-2012 09:19, Borislav Petkov escreveu:
> >> - on SB, the MCE status register only has the error message. In order to get
> >>   the DIMM location, the driver needs to parse the registers that describe
> >>   how the DIMM's are organized (this is spread on dozens of PCI devices, and
> >>   200+ registers), and how they're interlaced, in order to convert the error 
> >>   address reported by the MCA into a DIMM location.
> > 
> > As I already said, amd64_edac does a similar thing does already so I
> > don't see any difference in the solutions there: decode to the DIMM and
> > pass the info through 'msg'.
> 
> My concern is; on Sandy Bridge, is it safe to gather info about the DIMM
> location in/from machine check context in a reasonable time span?

Well, what amd64_edac does is "buffer" the required lookup info so
whenever you get an error, you simply lookup the channel and chip select
- all ops which can be done in atomic context.

[..]

> Getting back to the "msg" I think it is not necessary if it does not
> contain any new data which is not available in the mce_record today.
> If you just want to add field about physical memory location, I think
> string "msg" is not only way to do so.

No, currently, the mce_record contains the following, for example:

CPU: 0, MCGc/s: 0/0, MC4: d604c00006080a41, ADDR/MISC: 0000000000000016/dead57ac1ba0babe, RIP: 00:<0000000000000000>, TSC: 0, TIME: 0

With the decoded info added, it becomes:

[Hardware Error]: CPU:0 MC4_STATUS[Over|CE|-|PCC|AddrV|CECC]: 0xd604c00006080a41 MC4_ADDR: 0x0000000000000016
[Hardware Error]: Northbridge Error (node 0): DRAM ECC error detected on the NB.
[Hardware Error]: ERR_ADDR: 0x16 row: 0, channel: 0
[Hardware Error]: cache level: L1, mem/io: MEM, mem-tx: DWR, part-proc: RES (no timeout)
[Hardware Error]: CPU: 0, MCGc/s: 0/0, MC4: d604c00006080a41, ADDR/MISC: 0000000000000016/dead57ac1ba0babe, RIP: 00:<0000000000000000>, TSC: 0, TIME: 0)

where the ERR_ADDR line comes from amd64_edac looking up the error address.

This way, you get all the info needed to understand what the MCi_STATUS
of this MCE is telling you without any APM searching you'd normally have
to do to understand what each field means.

HTH.

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
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