linux-kernel - RE: [PATCH 1/3] mce: Add a msg string to the MCE tracepoint

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Message-ID: <3908561D78D1C84285E8C5FCA982C28F04117B@ORSMSX104.amr.corp.intel.com>
Date:	Fri, 2 Mar 2012 20:05:13 +0000
From:	"Luck, Tony" <tony.luck@...el.com>
To:	Hidetoshi Seto <seto.hidetoshi@...fujitsu.com>
CC:	Borislav Petkov <bp@...64.org>,
	Mauro Carvalho Chehab <mchehab@...hat.com>,
	Ingo Molnar <mingo@...e.hu>,
	EDAC devel <linux-edac@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/3] mce: Add a msg string to the MCE tracepoint

    - It would be better to have a well organized table rather than
      having a raw copy of config space etc.

I think it would be challenging to come up with a table format that
can handle all the address mapping options that SNB memory controller
can set up.

E.g. I have a very simple setup with all DIMM slots populated with the
same size/speed DIMMS.  If I pick a page at random and lookup which DIMM
slot each cache line translates to, I'll see a simple pattern:

	A1 B1 C1 D1 A1 B1 C1 D1 ...

as lines are sequentially placed across all four channels.  Looking at
other pages I'll sometimes see that pattern, and sometimes see that the
other set of DIMM slots was chosen

	A2 B2 C2 D2 A2 B2 C2 D2 ...

The decision to use slot1 vs. slot2 DIMMs on the channel may depend on
the XOR of a couple of bit fields from the full physical address.

But life might not be that simple. I can fill DIMM slots with different
size/speed DIMMs - which will affect the interleave options. About the
only restriction on placement is that you cannot fill a "2" slot on a
channel unless you have a DIMM present in the "1" slot.

Then there are a handful of BIOS options that may change things - e.g.
you could turn off NUMA mode - then you'll find that pages are striped
across DIMMs from all nodes.

Ultimately your table generation code would have to take into account
all of the mapping possibilities in the h/w ... at which point it would
be far simpler to just write a routine that performs the same translation
that the h/w does (based on the values from those memory controller
config registers).

-Tony
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