lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-Id: <20120308133942.45065b61e8a8a6bf0e2aa2ed@canb.auug.org.au>
Date:	Thu, 8 Mar 2012 13:39:42 +1100
From:	Stephen Rothwell <sfr@...b.auug.org.au>
To:	Dave Jones <davej@...hat.com>
Cc:	linux-next@...r.kernel.org, linux-kernel@...r.kernel.org,
	Russell King <rmk+kernel@....linux.org.uk>,
	Dave Jones <davej@...hat.com>, Kevin Hilman <khilman@...com>,
	"Heiko Stübner" <heiko@...ech.de>
Subject: linux-next: manual merge of the cpufreq tree with the
 cpufreq-current tree

Hi Dave,

Today's linux-next merge of the cpufreq tree got a conflict in
drivers/cpufreq/Kconfig.arm between commit b09db45c56c2 ("cpufreq: OMAP
driver depends CPUfreq tables") from the cpufreq-current tree and commit
34ee55075265 ("[CPUFREQ] Add S3C2416/S3C2450 cpufreq driver") from the
cpufreq tree.

Just context changes.  I fixed it up (see below) and can carry the fix as
necessary.
-- 
Cheers,
Stephen Rothwell                    sfr@...b.auug.org.au

diff --cc drivers/cpufreq/Kconfig.arm
index 82f1aa9,dc59abf..0000000
--- a/drivers/cpufreq/Kconfig.arm
+++ b/drivers/cpufreq/Kconfig.arm
@@@ -2,11 -2,28 +2,33 @@@
  # ARM CPU Frequency scaling drivers
  #
  
 +config ARM_OMAP2PLUS_CPUFREQ
 +	bool "TI OMAP2+"
 +	default ARCH_OMAP2PLUS
 +	select CPU_FREQ_TABLE
 +
+ config ARM_S3C2416_CPUFREQ
+ 	bool "S3C2416 CPU Frequency scaling support"
+ 	depends on CPU_S3C2416
+ 	help
+ 	  This adds the CPUFreq driver for the Samsung S3C2416 and
+ 	  S3C2450 SoC. The S3C2416 supports changing the rate of the
+ 	  armdiv clock source and also entering a so called dynamic
+ 	  voltage scaling mode in which it is possible to reduce the
+ 	  core voltage of the cpu.
+ 
+ 	  If in doubt, say N.
+ 
+ config ARM_S3C2416_CPUFREQ_VCORESCALE
+ 	bool "Allow voltage scaling for S3C2416 arm core (EXPERIMENTAL)"
+ 	depends on ARM_S3C2416_CPUFREQ && REGULATOR && EXPERIMENTAL
+ 	help
+ 	  Enable CPU voltage scaling when entering the dvs mode.
+ 	  It uses information gathered through existing hardware and
+ 	  tests but not documented in any datasheet.
+ 
+ 	  If in doubt, say N.
+ 
  config ARM_S3C64XX_CPUFREQ
  	bool "Samsung S3C64XX"
  	depends on CPU_S3C6410

Content of type "application/pgp-signature" skipped

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ