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Message-ID: <CAErSpo7d-pCZf9xj2i8K0gj=XRp4gOx3Fw=NoYTgFsqdNhciBA@mail.gmail.com>
Date: Thu, 15 Mar 2012 15:36:05 -0600
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: Yinghai Lu <yinghai@...nel.org>
Cc: Jesse Barnes <jbarnes@...tuousgeek.org>, x86 <x86@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 07/12] PCI: Make piix4 quirk to use addon_resource support
On Tue, Mar 13, 2012 at 1:26 AM, Yinghai Lu <yinghai@...nel.org> wrote:
> after they are put in add-on resources, they will be safely claimed later.
Wow, this seems to do a lot more than you mention in the changelog.
Is this really just doing the same thing as it used to, but using some
new interfaces? If so, too bad that it requires 60 more lines of code
than it used to.
> Signed-off-by: Yinghai Lu <yinghai@...nel.org>
> ---
> drivers/pci/quirks.c | 93 +++++++++++++++++++++++++++++++++++++++++--------
> 1 files changed, 77 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 7ef4183..cbe7dd9 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -383,14 +383,14 @@ static void __devinit quirk_ali7101_acpi(struct pci_dev *dev)
> }
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, quirk_ali7101_acpi);
>
> -static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
> +static int piix4_read_io(struct pci_dev *dev, struct resource *res, int port)
> {
> u32 devres;
> u32 mask, size, base;
> + struct pci_bus_region bus_region;
>
> pci_read_config_dword(dev, port, &devres);
> - if ((devres & enable) != enable)
> - return;
> +
> mask = (devres >> 16) & 15;
> base = devres & 0xffff;
> size = 16;
> @@ -400,23 +400,53 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p
> break;
> size = bit;
> }
> - /*
> - * For now we only print it out. Eventually we'll want to
> - * reserve it (at least if it's in the 0x1000+ range), but
> - * let's get enough confirmation reports first.
> - */
> base &= -size;
> - dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1);
> +
> + bus_region.start = base;
> + bus_region.end = base + size - 1;
> + res->flags |= IORESOURCE_IO;
> + pcibios_bus_to_resource(dev, res, &bus_region);
> + dev_info(&dev->dev, "PIO at %pR\n", res);
> +
> + return 0;
> }
> +static int piix4_write_io(struct pci_dev *dev, struct resource *res, int port)
> +{
> + u32 devres;
> + struct pci_bus_region bus_region;
> +
> + pcibios_resource_to_bus(dev, &bus_region, res);
>
> -static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
> + pci_read_config_dword(dev, port, &devres);
> + devres &= 0xffff0000;
> + devres |= bus_region.start & 0xffff;
> + pci_write_config_dword(dev, port, devres);
> +
> + return 0;
> +}
> +static struct resource_ops piix4_io_ops = {
> + .read = piix4_read_io,
> + .write = piix4_write_io,
> +};
> +static void piix4_io_quirk(struct pci_dev *dev, char *name, unsigned int port,
> + unsigned int enable)
> {
> u32 devres;
> - u32 mask, size, base;
>
> pci_read_config_dword(dev, port, &devres);
> if ((devres & enable) != enable)
> return;
> +
> + add_pci_dev_addon_resource(dev, port, 0, &piix4_io_ops, name);
> +}
> +
> +static int piix4_read_mem(struct pci_dev *dev, struct resource *res, int port)
> +{
> + u32 devres;
> + u32 mask, size, base;
> + struct pci_bus_region bus_region;
> +
> + pci_read_config_dword(dev, port, &devres);
> base = devres & 0xffff0000;
> mask = (devres & 0x3f) << 16;
> size = 128 << 16;
> @@ -426,12 +456,43 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
> break;
> size = bit;
> }
> - /*
> - * For now we only print it out. Eventually we'll want to
> - * reserve it, but let's get enough confirmation reports first.
> - */
> base &= -size;
> - dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1);
> + bus_region.start = base;
> + bus_region.end = base + size - 1;
> + res->flags |= IORESOURCE_MEM;
> + pcibios_bus_to_resource(dev, res, &bus_region);
> + dev_info(&dev->dev, "MMIO at %pR\n", res);
> +
> + return 0;
> +}
> +static int piix4_write_mem(struct pci_dev *dev, struct resource *res, int port)
> +{
> + u32 devres;
> + struct pci_bus_region bus_region;
> +
> + pcibios_resource_to_bus(dev, &bus_region, res);
> +
> + pci_read_config_dword(dev, port, &devres);
> + devres &= 0x0000ffff;
> + devres |= bus_region.start & 0xffff0000;
> + pci_write_config_dword(dev, port, devres);
> +
> + return 0;
> +}
> +static struct resource_ops piix4_mem_ops = {
> + .read = piix4_read_mem,
> + .write = piix4_write_mem,
> +};
> +static void piix4_mem_quirk(struct pci_dev *dev, char *name, unsigned int port,
> + unsigned int enable)
> +{
> + u32 devres;
> +
> + pci_read_config_dword(dev, port, &devres);
> + if ((devres & enable) != enable)
> + return;
> +
> + add_pci_dev_addon_resource(dev, port, 0, &piix4_mem_ops, name);
> }
>
> /*
> --
> 1.7.7
>
--
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