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Message-ID: <20120316165447.GA10678@aftab>
Date: Fri, 16 Mar 2012 17:54:47 +0100
From: Borislav Petkov <bp@...64.org>
To: Mauro Carvalho Chehab <mchehab@...hat.com>
Cc: Borislav Petkov <bp@...64.org>,
Greg KH <gregkh@...uxfoundation.org>,
Linux Edac Mailing List <linux-edac@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 0/6] Add a per-dimm structure
On Fri, Mar 16, 2012 at 11:07:10AM -0300, Mauro Carvalho Chehab wrote:
> The patches are (will be, after mirror sync) at:
> git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git hw_events_v8
Please send them for a normal review after you've changed them as per
Greg's request.
..
> I decided to code the ras functions it as a new class, under:
> /sys/class/ras
>
> I didn't convert yet the code that creates the CE/UE error counters
> per rank/dimm/branch/csrow, as it will need some changes. The code is
> also creating a "power" subdir, of course, this is uneeded/unwanted,
> but the basic stuff is already there:
>
> $ tree /sys/class/ras
> /sys/class/ras
> ├── mc0 -> ../../devices/pci0000:3f/0000:3f:03.0/ras/mc0
> ├── rank0 -> ../../devices/pci0000:3f/0000:3f:03.0/ras/mc0/rank0
> ├── rank1 -> ../../devices/pci0000:3f/0000:3f:03.0/ras/mc0/rank1
> ├── rank3 -> ../../devices/pci0000:3f/0000:3f:03.0/ras/mc0/rank3
> └── rank6 -> ../../devices/pci0000:3f/0000:3f:03.0/ras/mc0/rank6
>
> $ tree /sys/class/ras/mc0
> /sys/class/ras/mc0
> ├── ce_count
> ├── ce_noinfo_count
> ├── device -> ../../../0000:3f:03.0
> ├── fake_inject
This node needs to go to debugfs.
Thanks.
--
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Boris.
Advanced Micro Devices GmbH
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