linux-kernel - Re: [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

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Message-ID: <1332960747_131180@CP5-2952>
Date:	Wed, 28 Mar 2012 19:52:16 +0100
From:	Chris Wilson <chris@...is-wilson.co.uk>
To:	Daniel Kurtz <djkurtz@...omium.org>,
	Daniel Vetter <daniel@...ll.ch>,
	Keith Packard <keithp@...thp.com>,
	David Airlie <airlied@...ux.ie>,
	dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Cc:	Benson Leung <bleung@...omium.org>,
	Yufeng Shen <miletus@...omium.org>,
	Daniel Kurtz <djkurtz@...omium.org>
Subject: Re: [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

On Thu, 29 Mar 2012 02:26:37 +0800, Daniel Kurtz <djkurtz@...omium.org> wrote:
> It is very common for an i2c device to require a small 1 or 2 byte write
> followed by a read.  For example, when reading from an i2c EEPROM it is
> common to write and address, offset or index followed by a reading some
> values.

Hmm, I have

"gmbus1, bits 8-15: 8-bit GMBUS slave register
This field is redundant and should not be used."

Scary. :)

Otherwise, the code itself looks correct and quite neatly done now.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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