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Message-Id: <20120328223155.AD0A63E0DAA@localhost>
Date: Wed, 28 Mar 2012 16:31:55 -0600
From: Grant Likely <grant.likely@...retlab.ca>
To: David Daney <ddaney.cavm@...il.com>, linux-mips@...ux-mips.org,
ralf@...ux-mips.org, devicetree-discuss@...ts.ozlabs.org,
Rob Herring <rob.herring@...xeda.com>
Cc: linux-kernel@...r.kernel.org, David Daney <david.daney@...ium.com>
Subject: Re: [PATCH v7 2/4] MIPS: Octeon: Setup irq_domains for interrupts.
On Mon, 26 Mar 2012 12:31:19 -0700, David Daney <ddaney.cavm@...il.com> wrote:
> From: David Daney <david.daney@...ium.com>
>
> Create two domains. One for the GPIO lines, and the other for on-chip
> sources.
>
> Signed-off-by: David Daney <david.daney@...ium.com>
> ---
[...]
> +struct octeon_irq_gpio_domain_data {
> + unsigned int base_hwirq;
> +};
Hmmm...
> +static int octeon_irq_gpio_xlat(struct irq_domain *d,
> + struct device_node *node,
> + const u32 *intspec,
> + unsigned int intsize,
> + unsigned long *out_hwirq,
> + unsigned int *out_type)
> +{
[...]
> + *out_hwirq = gpiod->base_hwirq + pin;
...base_hwirq is only used here...
[...]
> + gpiod = kzalloc(sizeof (*gpiod), GFP_KERNEL);
> + if (gpiod) {
> + /* gpio domain host_data is the base hwirq number. */
> + gpiod->base_hwirq = 16;
> + irq_domain_add_linear(gpio_node, 16, &octeon_irq_domain_gpio_ops, gpiod);
... and it is unconditionally set to 16. It looks to me like
base_hwirq and the associated kzalloc() is unnecessary.
g.
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