lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 30 Mar 2012 13:24:38 +0100
From:	Chris Wilson <chris@...is-wilson.co.uk>
To:	Jiri Slaby <jslaby@...e.cz>
Cc:	Jiri Slaby <jirislaby@...il.com>,
	Keith Packard <keithp@...thp.com>,
	dri-devel@...ts.freedesktop.org,
	LKML <linux-kernel@...r.kernel.org>, daniel@...ll.ch
Subject: Re: i915_driver_irq_handler: irq 42: nobody cared

On Fri, 30 Mar 2012 14:11:47 +0200, Jiri Slaby <jslaby@...e.cz> wrote:
> On 03/30/2012 12:45 PM, Chris Wilson wrote:
> > On Fri, 30 Mar 2012 11:59:28 +0200, Jiri Slaby <jslaby@...e.cz> wrote:
> >> I don't know what to dump more, because iir is obviously zero too. What
> >> other sources of interrupts are on the (G33) chip?
> > 
> > IIR is the master interrupt, with chained secondary interrupt statuses.
> > If IIR is 0, the interrupt wasn't raised by the GPU.
> 
> This does not make sense, the handler does something different. Even if
> IIR is 0, it still takes a look at pipe stats.

That was introduced in 05eff845a28499762075d3a72e238a31f4d2407c to close
a race where the pipestat triggered an interrupt after we processed the
secondary registers and before reseting the primary.

But the basic premise that we should only enter the interrupt handler
with IIR!=0 holds (presuming non-shared interrupt lines such as MSI).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ