linux-kernel - Re: [PATCH] i2c: tegra: Add delay before reset the controller

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <4F75D734.3090109@wwwdotorg.org>
Date:	Fri, 30 Mar 2012 09:54:28 -0600
From:	Stephen Warren <swarren@...dotorg.org>
To:	Alok Chauhan <alokc@...dia.com>
CC:	khali@...ux-fr.org, ben-linux@...ff.org, w.sang@...gutronix.de,
	swarren@...dia.com, olof@...om.net, bones@...retlab.ca,
	omaplinuxkernel@...il.com, ccross@...roid.com,
	ldewangan@...dia.com, linux-tegra@...r.kernel.org,
	linux-i2c@...r.kernel.org, dgreid@...omium.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] i2c: tegra: Add delay before reset the controller

On 03/30/2012 06:06 AM, Alok Chauhan wrote:
> In NACK error condition, I2C controller violates
> clock-to-data setup time before stop. In Software,
> because of this reset of controller is happening
> before I2C controller could complete STOP condition.

I'm not quite sure this description is correct. Surely what's happening
is simply that the controller raises the NACK interrupt as soon as it
detects a NACK condition. Then, the controller generates the STOP
condition on the bus correctly. The issue is that if software resets the
controller as soon as the NACK interrupt is raised, this will happen
before the controller has completely delivered the STOP condition onto
the bus, so we need to pause and wait for that?

I think the commit description and comment in the code should be
reworded to describe what I wrote above, assuming it's accurate.

Is there really no idle bit we can poll in the I2C controller to
determine when the STOP has completed, rather than just delaying a
"hard-coded" time? Can I2C SCL clock-stretching affect the amount of
time that must be delayed?
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/