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Message-ID: <4F8D0AC8.5030006@linux.vnet.ibm.com>
Date:	Tue, 17 Apr 2012 14:16:40 +0800
From:	Xiao Guangrong <xiaoguangrong@...ux.vnet.ibm.com>
To:	Avi Kivity <avi@...hat.com>
CC:	Takuya Yoshikawa <takuya.yoshikawa@...il.com>,
	Marcelo Tosatti <mtosatti@...hat.com>,
	Xiao Guangrong <xiaoguangrong.eric@...il.com>,
	LKML <linux-kernel@...r.kernel.org>, KVM <kvm@...r.kernel.org>
Subject: Re: [PATCH 00/13] KVM: MMU: fast page fault

On 04/15/2012 05:32 PM, Avi Kivity wrote:

> On 04/13/2012 05:25 PM, Takuya Yoshikawa wrote:
>> I forgot to say one important thing -- I might give you wrong impression.
>>
>> I am perfectly fine with your lock-less work.  It is really nice!
>>
>> The reason I say much about O(1) is that O(1) and rmap based
>> GET_DIRTY_LOG have fundamentally different characteristics.
>>
>> I am thinking really seriously how to make dirty page tracking work
>> well with QEMU in the future.
>>
>> For example, I am thinking about multi-threaded and fine-grained
>> GET_DIRTY_LOG.
>>
>> If we use rmap based GET_DIRTY_LOG, we can restrict write protection to
>> only a selected area of one guest memory slot.
>>
>> So we may be able to make each thread process dirty pages independently
>> from other threads by calling GET_DIRTY_LOG for its own area.
>>
>> But I know that O(1) has its own good point.
>> So please wait a bit.  I will write up what I am thinking or send patches.
>>
>> Anyway, I am looking forward to your lock-less work!
>> It will improve the current GET_DIRTY_LOG performance.
>>
>>
> 
> Just to throw another idea into the mix - we can have write-protect-less
> dirty logging, too.  Instead of write protection, drop the dirty bit,
> and check it again when reading the dirty log.  It might look like we're
> accessing the spte twice here, but it's actually just once - when we
> check it to report for GET_DIRTY_LOG call N, we also prepare it for call
> N+1.
> 


Walking all gfn's rmap is still expensive, at least, it is not good for
the scalability.

I want to use a generation number to notify mmu write-protect the PML4s.
It is complete out of mmu-lock and comparing lockless write enabling can
let it rungs as parallel as possible.

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