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Message-ID: <4F95039E.9060009@linux.vnet.ibm.com>
Date:	Mon, 23 Apr 2012 15:24:14 +0800
From:	Xiao Guangrong <xiaoguangrong@...ux.vnet.ibm.com>
To:	Avi Kivity <avi@...hat.com>
CC:	Marcelo Tosatti <mtosatti@...hat.com>,
	Xiao Guangrong <xiaoguangrong.eric@...il.com>,
	LKML <linux-kernel@...r.kernel.org>, KVM <kvm@...r.kernel.org>
Subject: Re: [PATCH v3 4/9] KVM: MMU: introduce SPTE_ALLOW_WRITE bit

On 04/22/2012 11:12 PM, Avi Kivity wrote:

> On 04/21/2012 07:22 AM, Marcelo Tosatti wrote:
>> On Sat, Apr 21, 2012 at 11:30:55AM +0800, Xiao Guangrong wrote:
>>> On 04/21/2012 05:39 AM, Marcelo Tosatti wrote:
>>>
>>>
>>>>> @@ -1177,9 +1178,8 @@ static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
>>>>>  			new_spte = *sptep & ~PT64_BASE_ADDR_MASK;
>>>>>  			new_spte |= (u64)new_pfn << PAGE_SHIFT;
>>>>>
>>>>> -			new_spte &= ~PT_WRITABLE_MASK;
>>>>> -			new_spte &= ~SPTE_HOST_WRITEABLE;
>>>>> -			new_spte &= ~shadow_accessed_mask;
>>>>> +			new_spte &= ~(PT_WRITABLE_MASK | SPTE_HOST_WRITEABLE |
>>>>> +				      shadow_accessed_mask | SPTE_ALLOW_WRITE);
>>>>
>>>> Each bit should have a distinct meaning. Here the host pte is being
>>>> write-protected, which means only the SPTE_HOST_WRITEABLE bit
>>>> should be cleared.
>>>
>>>
>>> Hmm, it is no problem if SPTE_ALLOW_WRITE is not cleared.
>>>
>>> But the meaning of SPTE_ALLOW_WRITE will become strange: we will see a
>>> spte with spte.SPTE_ALLOW_WRITE = 1 (means the spte is writable on host
>>> and guest) and spte.SPTE_HOST_WRITEABLE = 0 (means the spte is read-only
>>> on host).
>>  
>> You are combining gpte writable bit, and host pte writable bit (which
>> are separate and independent of each other) into one bit. 
>>
>> SPTE_HOST_WRITEABLE already indicates whether the host pte is writable 
>> or not.
> 
> Maybe we should rename SPTE_ALLOW_WRITE to SPTE_NOT_SHADOWED (or
> SPTE_SHADOWED with the opposite meaning).
> 
> Alternatively, SPTE_MMU_WRITEABLE (complements SPTE_HOST_WRITEABLE).
> 


I like SPTE_MMU_WRITEABLE :)

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