linux-kernel - Re: [PATCH v3 2/4] pinctrl: pinctrl-imx: add imx pinctrl core driver

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Message-ID: <20120427063109.GR9142@game.jcrosoft.org>
Date:	Fri, 27 Apr 2012 08:31:09 +0200
From:	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>
To:	Dong Aisheng <aisheng.dong@...escale.com>
Cc:	Dong Aisheng-B29396 <B29396@...escale.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Zhao Richard-B20223 <B20223@...escale.com>,
	"linus.walleij@...ricsson.com" <linus.walleij@...ricsson.com>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	"rob.herring@...xeda.com" <rob.herring@...xeda.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"kernel@...gutronix.de" <kernel@...gutronix.de>,
	"cjb@...top.org" <cjb@...top.org>,
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>
Subject: Re: [PATCH v3 2/4] pinctrl: pinctrl-imx: add imx pinctrl core
 driver

> > > +   this group of pins in this pin configuration node are working on.
> > > +3. The driver can use the function node's name and pin configuration node's
> > > +   name describe the pin function and group hierarchy.
> > > +   For example, Linux IMX pinctrl driver takes the function node's name
> > > +   as the function name and pin configuration node's name as group name to
> > > +   create the map table.
> > > +4. Each pin configuration node should have a phandle, devices can set pins
> > > +   configurations by referring to the phandle of that pin configuration node.
> > > +
> > > +Examples:
> > > +usdhc@...9c000 { /* uSDHC4 */
> > > +	fsl,card-wired;
> > > +	vmmc-supply = <&reg_3p3v>;
> > > +	status = "okay";
> > > +	pinctrl-names = "default";
> > > +	pinctrl-0 = <&pinctrl_usdhc4_1>;
> > > +};
> > > +
> > > +iomuxc@...e0000 {
> > > +	compatible = "fsl,imx6q-iomuxc";
> > > +	reg = <0x020e0000 0x4000>;
> > > +
> > > +	/* shared pinctrl settings */
> > > +	usdhc4 {
> > > +		pinctrl_usdhc4_1: usdhc4grp-1 {
> > > +			fsl,pins = <1386 0x17059	/* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
> > > +				    1392 0x17059	/* MX6Q_PAD_SD4_CLK__USDHC4_CLK	*/
> > > +				    1462 0x17059	/* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
> > > +				    1470 0x17059	/* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
> > > +				    1478 0x17059	/* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
> > > +				    1486 0x17059	/* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
> > > +				    1493 0x17059	/* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
> > > +				    1501 0x17059	/* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
> > > +				    1509 0x17059	/* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
> > > +				    1517 0x17059>;	/* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
> > honestly I don't like this it's obscure need to decode manually
> > 
> > I propose to use phandle
> > 
> > as example on uart you will want or not the rst/cts so you will have quite a
> > lot of bindings
> > 
> > so you can describe the pin configuration (function) and refer it by phandle
> > in the group
> > 
> Hmm, i can't say you're wrong.
> What you suggested may be suitable for your SoCs, before i know more about your SoC
> details, i may not comment too much.
> 
> The binding i used here basically follows the exist iomux v3 convention which we're
> using for non dt platforms, i think most people working on fsl platform may would
> want a similar using as before since iomux v3 is very easy to use for imx soc.
> You can refer to: iomux-mx51.h.
> 
> After dt macro support is available(which is still in progress), we may
> convert the raw data above to raw data then user do not need to decode
> the setting anymore.
this is not an excuse to duplicate bindings

Best Regards,
J.
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