linux-kernel - Re: [PATCH 02/16] perf: Unified API to record selective sets of arch registers

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Message-ID: <CABPqkBSkdo8spm17qjBANJ5oYnU0Ri1wegxx4i0fQVvz976e+A@mail.gmail.com>
Date:	Wed, 2 May 2012 16:46:33 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Jiri Olsa <jolsa@...hat.com>
Cc:	acme@...hat.com, a.p.zijlstra@...llo.nl, mingo@...e.hu,
	paulus@...ba.org, cjashfor@...ux.vnet.ibm.com, fweisbec@...il.com,
	gorcunov@...nvz.org, tzanussi@...il.com, mhiramat@...hat.com,
	rostedt@...dmis.org, robert.richter@....com, fche@...hat.com,
	linux-kernel@...r.kernel.org, masami.hiramatsu.pt@...achi.com,
	drepper@...il.com, Arun Sharma <asharma@...com>
Subject: Re: [PATCH 02/16] perf: Unified API to record selective sets of arch registers

On Wed, May 2, 2012 at 2:58 PM, Jiri Olsa <jolsa@...hat.com> wrote:
>
> SNIP
>
>> >
>> > I just sent v3, with changed design to be more generic, please check
>> >
>> > anyway, currently there's no way to mix 32 and 64 bit registers in sample.
>> >
>> > As I mentioned above, once running compat task, 64 bit registers
>> > are stored anyway. Given that all 32 bit registers have 64 equiv.
>> > you can ask to store RAX|RBX|R15.
>> >
>> Well, R8-R15 do not exist in 32-bit mode. So I wonder what is saved
>> on the stack for those, probably nothing. And in that case, how do you
>> handle the case where the user asked for R15 but it is not available and
>> you know that only on PMU interrupt.
>
> right, R8-R15 do not exist in 32 bit mode, meaning that the 32 bit task
> do not use them... but when you enter 64 bit kernel from 32 bit compat
> task, still 64bits registers are saved.. as for native 64 process,

I am confused by your term '64-bit registers' here. I assume you
mean registers are saved as 64-bit integers. But that does not means
that the full set of 64-bit registers (incl. R8-R15) is saved. Unless
you're telling
me that whatever values are in those 64-bit ABI only registers are thus saved
on the stack.


> there's no difference.. so even for 32 bit task you get 64 bits
> registers described below.
>
>
> The availbility of registers is tricky for user space register dump.
>
> We dump whatever we got in pt_regs structure from perf_sample_regs_user.
> The problem is, that exception do not store all of the registers.. the rest
> of the registers is whatever is in stack occupying the pt_regs space.
>
> When kernel is entered (by exception or irq), following is saved by CPU
> (both 32 and 64 bits):
>  ss, sp, flags, cs ip
>
> followed by SAVE_ARGS  (for exception):
>        movq_cfi rdi, 8*8
>        movq_cfi rsi, 7*8
>        movq_cfi rdx, 6*8
>
>        .if \save_rcx
>        movq_cfi rcx, 5*8
>        .endif
>
>        movq_cfi rax, 4*8
>
>        .if \save_r891011
>        movq_cfi r8,  3*8
>        movq_cfi r9,  2*8
>        movq_cfi r10, 1*8
>        movq_cfi r11, 0*8
>
> SAVE_REST - saves the whole pt_regs structure just for the
> sake of the syscall_trace_enter function, once finished it's
> poped out..
>
> As for unwind we should get the most important ones. Of course
> the unwind could be based on any register, and with bogus value
> the unwind just stops.
>
> I think we are in better shape for irqs but I'd need to check.
>
> jirka
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