linux-kernel - Re: [PATCH 1/3] x86/tlb_info: get last level TLB entry number of CPU

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Message-ID: <4FA14F13.6040002@redhat.com>
Date:	Wed, 02 May 2012 11:13:23 -0400
From:	Rik van Riel <riel@...hat.com>
To:	Alex Shi <alex.shi@...el.com>
CC:	andi.kleen@...el.com, tim.c.chen@...ux.intel.com, jeremy@...p.org,
	chrisw@...s-sol.org, akataria@...are.com, tglx@...utronix.de,
	mingo@...hat.com, hpa@...or.com, rostedt@...dmis.org,
	fweisbec@...il.com, luto@....edu, avi@...hat.com,
	len.brown@...el.com, paul.gortmaker@...driver.com,
	dhowells@...hat.com, fenghua.yu@...el.com, borislav.petkov@....com,
	yinghai@...nel.org, cpw@....com, steiner@....com,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] x86/tlb_info: get last level TLB entry number of
 CPU

On 04/28/2012 04:50 AM, Alex Shi wrote:
> For 4KB pages, x86 CPU has 2 or 1 level TLB, first level is data TLB and
> instruction TLB, second level is shared TLB for both data and instructions.
>
> For hupe page TLB, usually there is just one level and seperated by 2MB/4MB
> and 1GB.
>
> Although each levels TLB size is important for performance tuning, but for
> genernal and rude optimizing, just last level TLB entry number is suitable.
> And in fact, last level TLB has the biggest entry number.
>
> This patch will get the biggest TLB entry number and use it in furture TLB
> optimizing.
>
> Signed-off-by: Alex Shi<alex.shi@...el.com>

Acked-by: Rik van Riel <riel@...hat.com>

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