linux-kernel - Re: [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific CPUs

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Message-ID: <4FA94239.2010503@linux.intel.com>
Date:	Tue, 08 May 2012 08:56:41 -0700
From:	Andi Kleen <ak@...ux.intel.com>
To:	"H. Peter Anvin" <hpa@...or.com>
CC:	Alex Shi <alex.shi@...el.com>, mgorman@...e.de, npiggin@...il.com,
	tglx@...utronix.de, mingo@...hat.com, arnd@...db.de,
	rostedt@...dmis.org, fweisbec@...il.com, jeremy@...p.org,
	gregkh@...uxfoundation.org, glommer@...hat.com, riel@...hat.com,
	luto@....edu, avi@...hat.com, len.brown@...el.com,
	dhowells@...hat.com, fenghua.yu@...el.com, borislav.petkov@....com,
	yinghai@...nel.org, cpw@....com, steiner@....com,
	akpm@...ux-foundation.org, penberg@...nel.org, hughd@...gle.com,
	rientjes@...gle.com, kosaki.motohiro@...fujitsu.com,
	n-horiguchi@...jp.nec.com, paul.gortmaker@...driver.com,
	trenn@...e.de, tj@...nel.org, oleg@...hat.com, axboe@...nel.dk,
	a.p.zijlstra@...llo.nl, kamezawa.hiroyu@...fujitsu.com,
	viro@...iv.linux.org.uk, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific
 CPUs


> This seems a bit concerning from a forward compatibility point of view.
>   It would make more sense to assume that future processors would behave
> more like the most recent (Sandy Bridge in your case) unless there is
> evidence to the contrary.
This would not work on new Atoms, which inter mix model numbers.

In the past I did a hack in other software to check the cache sizes to 
distinguish the two
for unknown models It's not pretty however.

-Andi


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