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Message-ID: <4FA94C71.7000402@zytor.com>
Date: Tue, 08 May 2012 09:40:17 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Andi Kleen <ak@...ux.intel.com>
CC: Alex Shi <alex.shi@...el.com>, mgorman@...e.de, npiggin@...il.com,
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Subject: Re: [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific
CPUs
On 05/08/2012 08:56 AM, Andi Kleen wrote:
>
>> This seems a bit concerning from a forward compatibility point of view.
>> It would make more sense to assume that future processors would behave
>> more like the most recent (Sandy Bridge in your case) unless there is
>> evidence to the contrary.
> This would not work on new Atoms, which inter mix model numbers.
>
That is another problem, but there isn't much we (as the Linux
community) can do about that, so we can just do the optimistic thing...
> In the past I did a hack in other software to check the cache sizes to
> distinguish the two
> for unknown models It's not pretty however.
Ick.
-hpa
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