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Date: Wed, 9 May 2012 14:23:44 +0200
From: Borislav Petkov <bp@...64.org>
To: Mauro Carvalho Chehab <mchehab@...hat.com>
Cc: Linux Edac Mailing List <linux-edac@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Doug Thompson <norsk5@...oo.com>
Subject: Re: [EDAC ABI v13 08/25] edac: use Documentation-nano format for
some data structs
On Mon, Apr 16, 2012 at 05:38:32PM -0300, Mauro Carvalho Chehab wrote:
> No functional changes. Just comment improvements.
>
> Reviewed-by: Aristeu Rozanski <arozansk@...hat.com>
> Cc: Doug Thompson <norsk5@...oo.com>
> Signed-off-by: Mauro Carvalho Chehab <mchehab@...hat.com>
> ---
> include/linux/edac.h | 80 +++++++++++++++++++++++++++++++++++--------------
> 1 files changed, 57 insertions(+), 23 deletions(-)
>
> diff --git a/include/linux/edac.h b/include/linux/edac.h
> index ffb189b..138b147 100644
> --- a/include/linux/edac.h
> +++ b/include/linux/edac.h
> @@ -45,7 +45,19 @@ static inline void opstate_init(void)
> #define EDAC_MC_LABEL_LEN 31
> #define MC_PROC_NAME_MAX_LEN 7
>
> -/* memory devices */
> +/**
> + * enum dev_type - describe the type of memory DRAM chips used at the stick
> + * @DEV_UNKNOWN: Can't be determined, or MC doesn't support detect it
> + * @DEV_X1: 1 bit for data
> + * @DEV_X2: 2 bits for data
> + * @DEV_X4: 4 bits for data
> + * @DEV_X8: 8 bits for data
> + * @DEV_X16: 16 bits for data
> + * @DEV_X32: 32 bits for data
> + * @DEV_X64: 64 bits for data
> + *
> + * Typical values are x4 and x8.
> + */
> enum dev_type {
> DEV_UNKNOWN = 0,
> DEV_X1,
> @@ -163,18 +175,29 @@ enum mem_type {
> #define MEM_FLAG_DDR3 BIT(MEM_DDR3)
> #define MEM_FLAG_RDDR3 BIT(MEM_RDDR3)
>
> -/* chipset Error Detection and Correction capabilities and mode */
> +/** enum edac-type - Error Detection and Correction capabilities and mode
This probably needs to be
/**
* enum edac-type
with the text starting on the second line and leaving the "/**" marker
alone on the first line.
> + * @EDAC_UNKNOWN: Unknown if ECC is available
> + * @EDAC_NONE: Doesn't support ECC
> + * @EDAC_RESERVED: Reserved ECC type
> + * @EDAC_PARITY: Detects parity errors
> + * @EDAC_EC: Error Checking - no correction
> + * @EDAC_SECDED: Single bit error correction, Double detection
> + * @EDAC_S2ECD2ED: Chipkill x2 devices - do these exist?
> + * @EDAC_S4ECD4ED: Chipkill x4 devices
> + * @EDAC_S8ECD8ED: Chipkill x8 devices
> + * @EDAC_S16ECD16ED: Chipkill x16 devices
> + */
> enum edac_type {
> - EDAC_UNKNOWN = 0, /* Unknown if ECC is available */
> - EDAC_NONE, /* Doesn't support ECC */
> - EDAC_RESERVED, /* Reserved ECC type */
> - EDAC_PARITY, /* Detects parity errors */
> - EDAC_EC, /* Error Checking - no correction */
> - EDAC_SECDED, /* Single bit error correction, Double detection */
> - EDAC_S2ECD2ED, /* Chipkill x2 devices - do these exist? */
> - EDAC_S4ECD4ED, /* Chipkill x4 devices */
> - EDAC_S8ECD8ED, /* Chipkill x8 devices */
> - EDAC_S16ECD16ED, /* Chipkill x16 devices */
> + EDAC_UNKNOWN = 0,
> + EDAC_NONE,
> + EDAC_RESERVED,
> + EDAC_PARITY,
> + EDAC_EC,
> + EDAC_SECDED,
> + EDAC_S2ECD2ED,
> + EDAC_S4ECD4ED,
> + EDAC_S8ECD8ED,
> + EDAC_S16ECD16ED,
> };
>
> #define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN)
> @@ -187,18 +210,29 @@ enum edac_type {
> #define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED)
> #define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED)
>
> -/* scrubbing capabilities */
> +/** enum scrub_type - scrubbing capabilities
ditto.
> + * @SCRUB_UNKNOWN Unknown if scrubber is available
> + * @SCRUB_NONE: No scrubber
> + * @SCRUB_SW_PROG: SW progressive (sequential) scrubbing
> + * @SCRUB_SW_SRC: Software scrub only errors
> + * @SCRUB_SW_PROG_SRC: Progressive software scrub from an error
> + * @SCRUB_SW_TUNABLE: Software scrub frequency is tunable
> + * @SCRUB_HW_PROG: HW progressive (sequential) scrubbing
> + * @SCRUB_HW_SRC: Hardware scrub only errors
> + * @SCRUB_HW_PROG_SRC: Progressive hardware scrub from an error
> + * SCRUB_HW_TUNABLE: Hardware scrub frequency is tunable
> + */
> enum scrub_type {
> - SCRUB_UNKNOWN = 0, /* Unknown if scrubber is available */
> - SCRUB_NONE, /* No scrubber */
> - SCRUB_SW_PROG, /* SW progressive (sequential) scrubbing */
> - SCRUB_SW_SRC, /* Software scrub only errors */
> - SCRUB_SW_PROG_SRC, /* Progressive software scrub from an error */
> - SCRUB_SW_TUNABLE, /* Software scrub frequency is tunable */
> - SCRUB_HW_PROG, /* HW progressive (sequential) scrubbing */
> - SCRUB_HW_SRC, /* Hardware scrub only errors */
> - SCRUB_HW_PROG_SRC, /* Progressive hardware scrub from an error */
> - SCRUB_HW_TUNABLE /* Hardware scrub frequency is tunable */
> + SCRUB_UNKNOWN = 0,
> + SCRUB_NONE,
> + SCRUB_SW_PROG,
> + SCRUB_SW_SRC,
> + SCRUB_SW_PROG_SRC,
> + SCRUB_SW_TUNABLE,
> + SCRUB_HW_PROG,
> + SCRUB_HW_SRC,
> + SCRUB_HW_PROG_SRC,
> + SCRUB_HW_TUNABLE
> };
>
> #define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)
> --
> 1.7.8
>
> --
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>
--
Regards/Gruss,
Boris.
Advanced Micro Devices GmbH
Einsteinring 24, 85609 Dornach
GM: Alberto Bozzo
Reg: Dornach, Landkreis Muenchen
HRB Nr. 43632 WEEE Registernr: 129 19551
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