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Message-Id: <1336666614-21090-10-git-send-email-fenghua.yu@intel.com>
Date: Thu, 10 May 2012 09:16:51 -0700
From: "Fenghua Yu" <fenghua.yu@...el.com>
To: "Ingo Molnar" <mingo@...e.hu>,
"Thomas Gleixner" <tglx@...utronix.de>,
"H Peter Anvin" <hpa@...or.com>,
"Linus Torvalds" <torvalds@...ux-foundation.org>,
"Andrew Morton" <akpm@...ux-foundation.org>,
"Asit K Mallick" <asit.k.mallick@...el.com>,
"Tony Luck" <tony.luck@...el.com>,
"Arjan Dan De Ven" <arjan@...ux.intel.com>,
"Suresh B Siddha" <suresh.b.siddha@...el.com>,
"Len Brown" <len.brown@...el.com>,
"Srivatssa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com>,
"Randy Dunlap" <rdunlap@...otime.net>,
"Chen Gong" <gong.chen@...ux.intel.com>,
"linux-kernel" <linux-kernel@...r.kernel.org>,
"linux-pm" <linux-pm@...r.kernel.org>, "x86" <x86@...nel.org>
Cc: "Fenghua Yu" <fenghua.yu@...el.com>
Subject: [PATCH v6 09/12] x86/common.c: Init CPU0 data during CPU0 online
From: Fenghua Yu <fenghua.yu@...el.com>
During CPU0 online, enable x2apic, re-init mcheck, set_numa_node, add numa mask,
and enable sep cpu for CPU0.
Signed-off-by: Fenghua Yu <fenghua.yu@...el.com>
---
arch/x86/include/asm/processor.h | 1 +
arch/x86/kernel/cpu/common.c | 17 ++++++++++++++---
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index ccbb1ea..81d6993 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -169,6 +169,7 @@ extern struct pt_regs *idle_regs(struct pt_regs *);
extern void early_cpu_init(void);
extern void identify_boot_cpu(void);
+extern void identify_boot_cpu_online(void);
extern void identify_secondary_cpu(struct cpuinfo_x86 *);
extern void print_cpu_info(struct cpuinfo_x86 *);
void print_cpu_msr(struct cpuinfo_x86 *);
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index cf79302..7f9f481 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -913,6 +913,18 @@ void __init identify_boot_cpu(void)
#endif
}
+void __cpuinit identify_boot_cpu_online(void)
+{
+ mcheck_cpu_init(&boot_cpu_data);
+
+#ifdef CONFIG_NUMA
+ numa_add_cpu(smp_processor_id());
+#endif
+#ifdef CONFIG_X86_32
+ enable_sep_cpu();
+#endif
+}
+
void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
{
BUG_ON(c == &boot_cpu_data);
@@ -1185,7 +1197,7 @@ void __cpuinit cpu_init(void)
oist = &per_cpu(orig_ist, cpu);
#ifdef CONFIG_NUMA
- if (cpu != 0 && percpu_read(numa_node) == 0 &&
+ if (percpu_read(numa_node) == 0 &&
early_cpu_to_node(cpu) != NUMA_NO_NODE)
set_numa_node(early_cpu_to_node(cpu));
#endif
@@ -1217,8 +1229,7 @@ void __cpuinit cpu_init(void)
barrier();
x86_configure_nx();
- if (cpu != 0)
- enable_x2apic();
+ enable_x2apic();
/*
* set up and load the per-CPU TSS
--
1.6.0.3
--
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