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Message-Id: <1336772086-17248-1-git-send-email-ddaney.cavm@gmail.com>
Date:	Fri, 11 May 2012 14:34:44 -0700
From:	David Daney <ddaney.cavm@...il.com>
To:	devicetree-discuss@...ts.ozlabs.org,
	Grant Likely <grant.likely@...retlab.ca>,
	Rob Herring <rob.herring@...xeda.com>,
	spi-devel-general@...ts.sourceforge.net
Cc:	linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org,
	linux-doc@...r.kernel.org, David Daney <david.daney@...ium.com>
Subject: [PATCH 0/2] MIPS/spi: New driver for SPI master controller for OCTEON SOCs.

From: David Daney <david.daney@...ium.com>

Several members of the OCTEON family have on-chips SPI master
controller hardware, so here is a driver for it.

I split the register definitions out to a separate patch so that they
live with all the other similar files for other OCTEON hardware blocks
in arch/mips/include/asm/octeon.  This does leave the question of who
should merge these.  I don't have a preference, could be Ralf's
Linux/MIPS tree or via the SPI maintainers.

Tested by driving an at25 eeprom.

David Daney (2):
  MIPS: OCTEON: Add register definitions for SPI host hardware.
  spi: Add SPI master controller for OCTEON SOCs.

 .../devicetree/bindings/spi/spi-octeon.txt         |   33 ++
 arch/mips/include/asm/octeon/cvmx-mpi-defs.h       |  328 +++++++++++++++++
 drivers/spi/Kconfig                                |    7 +
 drivers/spi/Makefile                               |    1 +
 drivers/spi/spi-octeon.c                           |  369 ++++++++++++++++++++
 5 files changed, 738 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/spi-octeon.txt
 create mode 100644 arch/mips/include/asm/octeon/cvmx-mpi-defs.h
 create mode 100644 drivers/spi/spi-octeon.c

-- 
1.7.2.3

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