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Date: Mon, 14 May 2012 16:28:35 +0000 From: "Luck, Tony" <tony.luck@...el.com> To: Borislav Petkov <bp@...64.org> CC: Chen Gong <gong.chen@...ux.intel.com>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, Ingo Molnar <mingo@...e.hu>, "Huang, Ying" <ying.huang@...el.com>, Hidetoshi Seto <seto.hidetoshi@...fujitsu.com> Subject: RE: [PATCH 2/2] x86/mce: Add instruction recovery signatures to mce-severity table > > I'm trying to figure out a quirk for processors that do generate > > EIPV=RIPV=0 signature for IFU errors. There are some case where > > we can work around the lack of EIPV. > > __mcheck_cpu_apply_quirks? The quirk is a bit more extensive than just setting some flag in there for "if (c->x86 == 6 && c->x86_model == 45)". Sometime EIPV isn't set because the regs->ip and regs->cs really aren't valid. So I'll need to do something like: if (we are on Intel family 6 model 45 AND this is a UC=1, PCC=0, AR=1, S=1, ADDRV=1, MCACOD=0x150 error AND (virtophys(regs->ip) >> PAGE_SHIFT) == (MC(bank)_ADDR >> PAGE_SHIFT)) { /* ok to trust CS & IP */ m.mcgstatus |= MCG_STATUS_EIPV; } before running through the mce_severity() table lookup. x86 doesn't seem to have a "virtophys()" that I can find. Closest is lookup_address(vaddr, level) which gets a pte (which is almost all the work). Sigh! -Tony -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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