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Message-ID: <CACRpkdaAeMV2yCNNP+e0BKaXEeZon2CKJs-TskVH5CVWXuqyiA@mail.gmail.com>
Date:	Mon, 14 May 2012 22:07:05 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	David Daney <ddaney.cavm@...il.com>
Cc:	devicetree-discuss@...ts.ozlabs.org,
	Grant Likely <grant.likely@...retlab.ca>,
	Rob Herring <rob.herring@...xeda.com>,
	spi-devel-general@...ts.sourceforge.net, linux-mips@...ux-mips.org,
	David Daney <david.daney@...ium.com>,
	linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org
Subject: Re: [PATCH 2/2] spi: Add SPI master controller for OCTEON SOCs.

On Fri, May 11, 2012 at 11:34 PM, David Daney <ddaney.cavm@...il.com> wrote:

> +       mpi_cfg.u64 = 0;
> +       mpi_cfg.u64 |= p->cs_enax;
> +       if (mpi_cfg.u64 != p->last_cfg) {

But now I see why this 64bit is so clever. Forget the comment on 1/2!
This has a certain elegance to it that I just learned to appreciate.

Yours,
Linus Walleij
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