linux-kernel - Re: [PATCH v5 6/7] x86/tlb: optimizing flush_tlb

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1337089145.14207.288.camel@gandalf.stny.rr.com>
Date:	Tue, 15 May 2012 09:39:05 -0400
From:	Steven Rostedt <rostedt@...dmis.org>
To:	Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc:	Luming Yu <luming.yu@...il.com>, Nick Piggin <npiggin@...il.com>,
	Alex Shi <alex.shi@...el.com>, tglx@...utronix.de,
	mingo@...hat.com, hpa@...or.com, arnd@...db.de, fweisbec@...il.com,
	jeremy@...p.org, riel@...hat.com, luto@....edu, avi@...hat.com,
	len.brown@...el.com, dhowells@...hat.com, fenghua.yu@...el.com,
	borislav.petkov@....com, yinghai@...nel.org, ak@...ux.intel.com,
	cpw@....com, steiner@....com, akpm@...ux-foundation.org,
	penberg@...nel.org, hughd@...gle.com, rientjes@...gle.com,
	kosaki.motohiro@...fujitsu.com, n-horiguchi@...jp.nec.com,
	tj@...nel.org, oleg@...hat.com, axboe@...nel.dk, jmorris@...ei.org,
	kamezawa.hiroyu@...fujitsu.com, viro@...iv.linux.org.uk,
	linux-kernel@...r.kernel.org, yongjie.ren@...el.com,
	linux-arch@...r.kernel.org, jcm@...masters.org
Subject: Re: [PATCH v5 6/7] x86/tlb: optimizing flush_tlb_mm

On Tue, 2012-05-15 at 15:06 +0200, Peter Zijlstra wrote:
> On Tue, 2012-05-15 at 20:58 +0800, Luming Yu wrote:
> > 
> > 
> > Both __native_flush_tlb() and __native_flush_tlb_single(...)
> > introduced roughly 1 ns  latency to tsc sampling executed in
> > stop_machine_context in two logical CPUs 
> 
> But you have to weight that against the cost of re-population, and
> that's the difficult bit, since we have no clue how many tlb entries are
> in use by the current cr3.
> 
> It might be possible for intel to give us this information, I've asked
> for something similar for cachelines.

What information? The # of tlb entries in use?

-- Steve


--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/