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Message-ID: <20120516174022.GA23332@amt.cnet>
Date:	Wed, 16 May 2012 14:40:22 -0300
From:	Marcelo Tosatti <mtosatti@...hat.com>
To:	Gleb Natapov <gleb@...hat.com>
Cc:	"Michael S. Tsirkin" <mst@...hat.com>, x86@...nel.org,
	kvm@...r.kernel.org, Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, Avi Kivity <avi@...hat.com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCHv4 3/5] kvm: host side for eoi optimization

On Wed, May 16, 2012 at 08:34:23PM +0300, Gleb Natapov wrote:
> On Wed, May 16, 2012 at 02:23:45PM -0300, Marcelo Tosatti wrote:
> > On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
> > > On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
> > > > On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
> > > > > On Wed, May 16, 2012 at 07:32:06PM +0300, Gleb Natapov wrote:
> > > > > > On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
> > > > > > > On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
> > > > > > > > > @@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
> > > > > > > > >  	int vector = kvm_apic_has_interrupt(vcpu);
> > > > > > > > >  	struct kvm_lapic *apic = vcpu->arch.apic;
> > > > > > > > >  
> > > > > > > > > -	if (vector == -1)
> > > > > > > > > +	/* Detect interrupt nesting and disable EOI optimization */
> > > > > > > > > +	if (pv_eoi_enabled(vcpu) && vector == -2)
> > > > > > > > > +		pv_eoi_clr_pending(vcpu);
> > > > > > > > > +
> > > > > > > > > +	if (vector < 0)
> > > > > > > > 
> > > > > > > > With interrupt window exiting, the guest will exit:
> > > > > > > > 
> > > > > > > > - as soon as it sets RFLAGS.IF=1 and there is any 
> > > > > > > > interrupt pending in IRR.
> > > > > > > > - any new interrupt is set in IRR will kick vcpu
> > > > > > > > out of guest mode and recalculate interrupt-window-exiting.
> > > > > > > > 
> > > > > > > > Doesnt this make this bit unnecessary ?
> > > > > > > 
> > > > > > > Looks like we could cut it out.  But I'm not sure how architectural it is
> > > > > > > that we exit on interrupt window.
> > > > > > We request exit on interrupt window only if there is pending irq that
> > > > > > can be delivered on a guest entry.
> > > > > 
> > > > > Aha. If so what Marcelo proposed won't work I think: if we inject A then B
> > > > > which is lower priority, we need an exit on EOI, we can't inject
> > > > > immediately.
> > > > 
> > > > Please describe the scenario clearly, i can't see the problem.
> > > 
> > > During vcpu entry there are two IRRs set 100 and 200. 200 is injected,
> > > but irq window is not requested because 100 can't be injected, During
> > > EOI exit 100 is injected.
> > 
> > interrupt window exiting is always requested if IRR is pending. Except 
> > if NMI window is requested (which has higher priority).
> > 
> This is where we enable irq window. We do it only if there is interrupt
> pending:
>                 if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
>                         kvm_x86_ops->enable_irq_window(vcpu);
> 
> kvm_cpu_has_interrupt() checks apic by calling kvm_apic_has_interrupt() 
> 
> 
> kvm_apic_has_interrupt():
>         apic_update_ppr(apic);
>         highest_irr = apic_find_highest_irr(apic);
>         if ((highest_irr == -1) ||
>             ((highest_irr & 0xF0) <= apic_get_reg(apic, APIC_PROCPRI)))
>                 return -1;
> And above checks IRR priority, so we can have IRR set and do not enable
> irq window exit.

Right, but then you cannot inject interrupt anyway so EOI is not
necessary. Instead TPR-below-threshold trap is set which handles
that case. No?



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