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Message-ID: <CAGjg+kEu0e=JyMz8F9Wxc36A-TQJ0iSW8LX6d9duZiz172e6AA@mail.gmail.com>
Date: Sat, 19 May 2012 08:13:48 +0800
From: Alex Shi <lkml.alex@...il.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Minchan Kim <minchan@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Nitin Gupta <ngupta@...are.org>,
Seth Jennings <sjenning@...ux.vnet.ibm.com>,
Dan Magenheimer <dan.magenheimer@...cle.com>,
linux-kernel@...r.kernel.org, linux-mm@...ck.org,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Tejun Heo <tj@...nel.org>,
David Howells <dhowells@...hat.com>, x86@...nel.org,
Nick Piggin <npiggin@...il.com>, Alex Shi <alex.shi@...el.com>
Subject: Re: [PATCH v2 3/3] x86: Support local_flush_tlb_kernel_range
On Thu, May 17, 2012 at 11:08 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Thu, 2012-05-17 at 16:51 +0200, Peter Zijlstra wrote:
>>
>> Also, does it even work if the range happens to be backed by huge pages?
>> IIRC we try and do the identity map with large pages wherever possible.
>
> OK, the Intel SDM seems to suggest it will indeed invalidate ANY mapping
> to that linear address, which would include 2M and 1G pages.
As for as I know, the 1GB TLB fold into 2MB now, and 2MB page still
maybe fold into 4K page in TLB flush. We are tracking this.
>
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