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Message-ID: <20120524060453.GC25344@aftab.osrc.amd.com>
Date:	Thu, 24 May 2012 08:04:53 +0200
From:	Borislav Petkov <bp@...64.org>
To:	Alex Shi <alex.shi@...el.com>
Cc:	Andrew Lutomirski <luto@....edu>,
	Peter Zijlstra <peterz@...radead.org>,
	Jan Beulich <JBeulich@...e.com>, borislav.petkov@....com,
	arnd@...db.de, akinobu.mita@...il.com, eric.dumazet@...il.com,
	fweisbec@...il.com, rostedt@...dmis.org, hughd@...gle.com,
	jeremy@...p.org, len.brown@...el.com, tony.luck@...el.com,
	yongjie.ren@...el.com, kamezawa.hiroyu@...fujitsu.com,
	seto.hidetoshi@...fujitsu.com, penberg@...nel.org,
	yinghai@...nel.org, tglx@...utronix.de, akpm@...ux-foundation.org,
	ak@...ux.intel.com, avi@...hat.com, dhowells@...hat.com,
	mingo@...hat.com, riel@...hat.com, cpw@....com, steiner@....com,
	linux-kernel@...r.kernel.org, viro@...iv.linux.org.uk,
	hpa@...or.com
Subject: Re: [PATCH v7 8/8] x86/tlb: just do tlb flush on one of siblings of
 SMT

On Thu, May 24, 2012 at 01:12:46PM +0800, Alex Shi wrote:
> On 05/24/2012 09:46 AM, Andrew Lutomirski wrote:
> 
> > On Wed, May 23, 2012 at 10:15 AM, Peter Zijlstra <peterz@...radead.org> wrote:
> >> On Wed, 2012-05-23 at 19:09 +0200, Peter Zijlstra wrote:
> >>>> There is no comment or anything else indicating that this is
> >>>> suitable for dual-thread CPUs only - when there are more than
> >>>> 2 threads per core, the intended effect won't be achieved.
> >>>
> >>> Why would that be? Won't higher thread count still share the same
> >>> resources just more so?
> >>
> >> Ah, I see, you're saying his code is buggy for >2 threads. Agreed.
> >>
> > 
> > An evil knob to statically choose which SMT sibling gets the interrupt
> > would be nice.  Then my compute-intensive thread could be (mostly)
> > unaffected by the other thread on a different core that calls munmap
> > frequently.
> 
> How to know we are in such situation? :)

Please, not yet another knob, we have too many as it is.

Can't you figure this out from the topology, smt siblings or whatever
this is called:

/sys/devices/system/cpu/cpu0/topology/thread_siblings

?

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
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