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Message-ID: <20120524060016.GB25344@aftab.osrc.amd.com>
Date:	Thu, 24 May 2012 08:00:16 +0200
From:	Borislav Petkov <bp@...64.org>
To:	Chen Gong <gong.chen@...ux.intel.com>
Cc:	"Luck, Tony" <tony.luck@...el.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	"bp@...64.org" <bp@...64.org>, "x86@...nel.org" <x86@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <peterz@...radead.org>
Subject: Re: [PATCH] x86: auto poll/interrupt mode switch for CMC to stop CMC
 storm

On Thu, May 24, 2012 at 10:23:38AM +0800, Chen Gong wrote:
> Hi, Boris, when I write these codes I don't care if it is specific for
> Intel or AMD.

Well, but I do care so that when you leave and start doing something
else, people after you can still read and maintain that code.

> I just noticed it should be general for x86 platform and all related
> codes are general too, which in mce.c, so I think it should be fine to
> place the codes in mce.c.

Are you kidding me? Only Intel has CMCI.

Now, if some other vendor needs correctable errors interrupt rate
throttling, they can carve it out, make it generic, and move it to mce.c.

Otherwise, it belongs in mce_intel.c. For the same reason AMD error
thresholding code belongs to mce_amd.c.

Jeez.

-- 
Regards/Gruss,
Boris.

Advanced Micro Devices GmbH
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