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Message-ID: <m2obpblvvj.fsf@firstfloor.org>
Date: Fri, 25 May 2012 15:49:04 -0700
From: Andi Kleen <andi@...stfloor.org>
To: Stephane Eranian <eranian@...gle.com>
Cc: David Ahern <dsahern@...il.com>,
Peter Zijlstra <peterz@...radead.org>,
LKML <linux-kernel@...r.kernel.org>,
Gleb Natapov <gleb@...hat.com>, Avi Kivity <avi@...hat.com>
Subject: Re: perf, x86: only do lbr init if bts is available
Stephane Eranian <eranian@...gle.com> writes:
> On Thu, May 24, 2012 at 6:41 PM, David Ahern <dsahern@...il.com> wrote:
>> On 5/24/12 10:35 AM, Stephane Eranian wrote:
>>>
>>> Well, no. There is no connection between BTS and LBR and you're creating
>>> one.
>>
>>
>> Ok. That was not clear to me from skimming the manual.
>> Then should it be tied to X86_FEATURE_DTES64?
>>
> No, it is unrelated to the Debug Store.
> There is really nothing you can use to figure that out, not event IA32_DEBUGCTL.
One way to do it would be to reread DEBUGCTL after writing and see if
the bit really changed to 1. If not assume LBR is not available.
-Andi
--
ak@...ux.intel.com -- Speaking for myself only
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