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Message-ID: <4FC3A768.3060208@antcom.de>
Date: Mon, 28 May 2012 18:27:20 +0200
From: Roland Stigge <stigge@...com.de>
To: Russell King - ARM Linux <linux@....linux.org.uk>
CC: alan@...ux.intel.com, gregkh@...uxfoundation.org,
linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
kevin.wells@....com, srinivas.bakki@....com,
linux-arm-kernel@...ts.infradead.org, arnd@...db.de
Subject: Re: [PATCH] serial/of-serial: Add 16654 chip to compatible string
list
On 28/05/12 17:03, Russell King - ARM Linux wrote:
>> Initially, with my RFC patch, there was an #ifdef for bigger FIFO in
>> case of LPC32xx where we have a 16550A variant with 64 byte fifos.
>
> What are all the differences? Is it just a larger FIFO?
Yes, this is how it's summarized in the manual (LPC32xx SoC).
>> So maybe 16750 is the better choice for me, anyway. Already supported in
>> of-serial. Works for now, but need more testing. Another hint is that
>> 16750 is advertised as "IP core for Soc" which matches the case of LPC32xx.
>
> 16750 also has automatic hardware flow control support, selectable through
> bit 5 in the MCR register. If your UART has that, then it's probably a
> 16750 derivative rather than a 16550 or 16650 derivative.
>
> 16650s have an EFR register at offset 2, selectable by writing 0xBF into
> the LCR register, which the 16750 doesn't have. 16650 also has automatic
> hardware flow control, bit this is selected through a couple of bits in
> the EFR.
The 4 LPC32xx's "Standard" UARTs have neither of those.
Is it ok to use "ns16650", i.e. PORT_16650, or do I need to introduce a
FIFO depth configuration?
Thanks in advance,
Roland
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