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Date: Fri, 01 Jun 2012 14:42:32 +0530
From: "Srivatsa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com>
To: tglx@...utronix.de, peterz@...radead.org,
paulmck@...ux.vnet.ibm.com
Cc: rusty@...tcorp.com.au, mingo@...nel.org, yong.zhang0@...il.com,
akpm@...ux-foundation.org, vatsa@...ux.vnet.ibm.com, rjw@...k.pl,
linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
srivatsa.bhat@...ux.vnet.ibm.com, nikunj@...ux.vnet.ibm.com,
Ralf Baechle <ralf@...ux-mips.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Eric Dumazet <eric.dumazet@...il.com>,
Mike Frysinger <vapier@...too.org>,
David Howells <dhowells@...hat.com>,
Arun Sharma <asharma@...com>,
Thomas Gleixner <tglx@...utronix.de>,
Rusty Russell <rusty@...tcorp.com.au>,
linux-mips@...ux-mips.org
Subject: [PATCH 10/27] mips, smpboot: Use generic SMP booting infrastructure
Convert mips to use the generic framework to boot secondary CPUs.
Notes:
1. The boot processor was setting the secondary cpu in cpu_online_mask!
Instead, leave it up to the secondary cpu (... and it will be done by the
generic code now).
2. Make the boot cpu wait for the secondary cpu to be set in cpu_online_mask
before returning.
3. Don't enable interrupts in cmp_smp_finish() and vsmp_smp_finish().
Do it much later, in generic code.
4. In synchronise_count_slave(), use local_save_flags() instead of
local_irq_save() because irqs are still disabled.
Cc: Ralf Baechle <ralf@...ux-mips.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Eric Dumazet <eric.dumazet@...il.com>
Cc: Mike Frysinger <vapier@...too.org>
Cc: David Howells <dhowells@...hat.com>
Cc: Arun Sharma <asharma@...com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Rusty Russell <rusty@...tcorp.com.au>
Cc: linux-mips@...ux-mips.org
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@...ux.vnet.ibm.com>
---
arch/mips/kernel/smp-cmp.c | 8 ++++----
arch/mips/kernel/smp-mt.c | 2 --
arch/mips/kernel/smp.c | 23 +++++++++++++++--------
arch/mips/kernel/sync-r4k.c | 3 ++-
4 files changed, 21 insertions(+), 15 deletions(-)
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index e7e03ec..7ecd6db 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -108,7 +108,9 @@ static void cmp_init_secondary(void)
static void cmp_smp_finish(void)
{
- pr_debug("SMPCMP: CPU%d: %s\n", smp_processor_id(), __func__);
+ unsigned int cpu = smp_processor_id();
+
+ pr_debug("SMPCMP: CPU%d: %s\n", cpu, __func__);
/* CDFIXME: remove this? */
write_c0_compare(read_c0_count() + (8 * mips_hpt_frequency / HZ));
@@ -116,10 +118,8 @@ static void cmp_smp_finish(void)
#ifdef CONFIG_MIPS_MT_FPAFF
/* If we have an FPU, enroll ourselves in the FPU-full mask */
if (cpu_has_fpu)
- cpu_set(smp_processor_id(), mt_fpu_cpumask);
+ cpumask_set_cpu(cpu, &mt_fpu_cpumask);
#endif /* CONFIG_MIPS_MT_FPAFF */
-
- local_irq_enable();
}
static void cmp_cpus_done(void)
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index ff17868..25f7b09 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -171,8 +171,6 @@ static void __cpuinit vsmp_smp_finish(void)
if (cpu_has_fpu)
cpu_set(smp_processor_id(), mt_fpu_cpumask);
#endif /* CONFIG_MIPS_MT_FPAFF */
-
- local_irq_enable();
}
static void vsmp_cpus_done(void)
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 71a95f5..4453d4d 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -33,6 +33,7 @@
#include <linux/cpu.h>
#include <linux/err.h>
#include <linux/ftrace.h>
+#include <linux/smpboot.h>
#include <linux/atomic.h>
#include <asm/cpu.h>
@@ -98,8 +99,11 @@ __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
*/
asmlinkage __cpuinit void start_secondary(void)
{
- unsigned int cpu;
+ smpboot_start_secondary(NULL);
+}
+void __cpuinit __cpu_pre_starting(void *unused)
+{
#ifdef CONFIG_MIPS_MT_SMTC
/* Only do cpu_probe for first TC of CPU */
if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
@@ -116,20 +120,22 @@ asmlinkage __cpuinit void start_secondary(void)
*/
calibrate_delay();
- preempt_disable();
- cpu = smp_processor_id();
- cpu_data[cpu].udelay_val = loops_per_jiffy;
+ cpu_data[smp_processor_id()].udelay_val = loops_per_jiffy;
+}
- notify_cpu_starting(cpu);
+void __cpuinit __cpu_pre_online(void *unused)
+{
+ unsigned int cpu = smp_processor_id();
mp_ops->smp_finish();
set_cpu_sibling_map(cpu);
cpu_set(cpu, cpu_callin_map);
+}
+void __cpuinit __cpu_post_online(void *unused)
+{
synchronise_count_slave();
-
- cpu_idle();
}
/*
@@ -196,7 +202,8 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
while (!cpu_isset(cpu, cpu_callin_map))
udelay(100);
- set_cpu_online(cpu, true);
+ while (!cpu_online(cpu))
+ udelay(100);
return 0;
}
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 99f913c..7f43069 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -46,7 +46,8 @@ void __cpuinit synchronise_count_master(void)
printk(KERN_INFO "Synchronize counters across %u CPUs: ",
num_online_cpus());
- local_irq_save(flags);
+ /* IRQs are already disabled. So just save the flags */
+ local_save_flags(flags);
/*
* Notify the slaves that it's time to start
--
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