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Message-ID: <b85d91d1e48a7c7531ba07075d81bb18bfdb00c1.1338474301.git.mst@redhat.com>
Date: Sun, 3 Jun 2012 10:27:53 +0300
From: "Michael S. Tsirkin" <mst@...hat.com>
To: x86@...nel.org, kvm@...r.kernel.org
Cc: Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
Avi Kivity <avi@...hat.com>,
Marcelo Tosatti <mtosatti@...hat.com>, gleb@...hat.com,
Linus Torvalds <torvalds@...ux-foundation.org>,
linux-kernel@...r.kernel.org, Thomas Gleixner <tglx@...utronix.de>
Subject: [PATCHv6 1/8] kvm: document lapic regs field
The logic in find_highest_vector looks
strange until you realize the reason for the
weird memory layout, which is because this is
what the CPU microcode expects.
Add a comment so this stops tripping people up.
Signed-off-by: Michael S. Tsirkin <mst@...hat.com>
---
arch/x86/kvm/lapic.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 6f4ce25..d29da25 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -13,6 +13,11 @@ struct kvm_lapic {
u32 divide_count;
struct kvm_vcpu *vcpu;
bool irr_pending;
+ /**
+ * APIC register page. The layout matches the register layout seen by
+ * the guest 1:1, because it is accessed by the vmx microcode.
+ * Note: Only one register, the TPR, is used by the microcode.
+ */
void *regs;
gpa_t vapic_addr;
struct page *vapic_page;
--
MST
--
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