linux-kernel - Re: [patch 2/2] x86: mce: Implement cmci poll mode for intel machines

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Message-ID: <alpine.LFD.2.02.1206042158200.3086@ionos>
Date:	Mon, 4 Jun 2012 22:01:01 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Chen Gong <gong.chen@...ux.intel.com>
cc:	LKML <linux-kernel@...r.kernel.org>, tony.luck@...el.com,
	bp@...64.org, x86@...nel.org, Peter Zijlstra <peterz@...radead.org>
Subject: Re: [patch 2/2] x86: mce: Implement cmci poll mode for intel
 machines

On Mon, 4 Jun 2012, Chen Gong wrote:
> > +/*
> > + * Ensure that the timer is firing in @interval from now.
> > + */
> > +void mce_timer_kick(unsigned long interval)
> > +{
> > +	struct timer_list *t = &__get_cpu_var(mce_timer);
> > +	unsigned long when = jiffies + interval;
> > +	unsigned long iv = __this_cpu_read(mce_next_interval);
> > +
> > +	if (time_before(when, t->expires) && timer_pending(t)) {
> > +		mod_timer(t, when);
> > +	} else if (!mce_next_interval) {
> 
> Why using mce_next_interval, it is a per_cpu var, should be non-NULL
> definitely, right? How about using *iv* here?

iv is the thing to use. No idea why I typoed mce_next_interval into
that.
 
> > +		t->expires = round_jiffies(jiffies + iv);
> > +		add_timer_on(t, smp_processor_id());
> > +	}
> > +	if (interval < iv)
> > +		__this_cpu_write(mce_next_interval, iv);
> >  }
> 
> This code should be __this_cpu_write(mce_next_interval, interval);?

Duh, yes.

Thanks,

	tglx
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