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Message-ID: <4FCE592F.80809@gmail.com>
Date:	Tue, 05 Jun 2012 13:08:31 -0600
From:	David Ahern <dsahern@...il.com>
To:	Stephane Eranian <eranian@...gle.com>
CC:	Peter Zijlstra <peterz@...radead.org>,
	Ingo Molnar <mingo@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>
Subject: Re: git bisect and perf

On 6/5/12 1:04 PM, Stephane Eranian wrote:
>> I'm referring to cycles:p
>>
>> model name      : Intel(R) Xeon(R) CPU           E5620  @ 2.40GHz
> That's not as helpful as /proc/cpuinfo. I suspect this is a Westmere
> system, isn't it?
>


Yes:
processor	: 15
vendor_id	: GenuineIntel
cpu family	: 6
model		: 44
model name	: Intel(R) Xeon(R) CPU           E5620  @ 2.40GHz
stepping	: 2
cpu MHz		: 2394.133
cache size	: 12288 KB

[    0.146055] Performance Events: PEBS fmt1+, Westmere events, Intel 
PMU driver.
[    0.146645] ... version:                3
[    0.146897] ... bit width:              48
[    0.147150] ... generic registers:      4
[    0.147404] ... value mask:             0000ffffffffffff
[    0.147657] ... max period:             000000007fffffff
[    0.147907] ... fixed-purpose events:   3
[    0.148158] ... event mask:             000000070000000f
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