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Message-ID: <20120605231352.GF27374@one.firstfloor.org>
Date:	Wed, 6 Jun 2012 01:13:52 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	Andi Kleen <andi@...stfloor.org>,
	Peter Zijlstra <peterz@...radead.org>,
	"Luck\\, Tony" <tony.luck@...el.com>,
	"Yu\\, Fenghua" <fenghua.yu@...el.com>,
	Rusty Russell <rusty@...tcorp.com.au>,
	Ingo Molnar <mingo@...e.hu>, H Peter Anvin <hpa@...or.com>,
	"Siddha\\, Suresh B" <suresh.b.siddha@...el.com>,
	"Mallick\\, Asit K" <asit.k.mallick@...el.com>,
	Arjan Dan De Ven <arjan@...ux.intel.com>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	x86 <x86@...nel.org>, linux-pm <linux-pm@...r.kernel.org>,
	"Srivatsa S. Bhat" <srivatsa.bhat@...ux.vnet.ibm.com>
Subject: Re: [PATCH 0/6] x86/cpu hotplug: Wake up offline CPU via mwait or nmi

> And aside of the above requirements it should add the ability to deal
> with the fact that aside of server workloads this needs to be able to
> cope with appplications in the embedded/mobile space which know more
> about the future system state than the scheduler itself.

Well solving world hunger in one try is hard. Baby steps are easier.

What I think would be useful short term is a clean mechanism for drivers
to lock a interrupt onto a CPU, without irqbalanced touching it. 
This would be mainly for MSI-X drivers to spread their interrupts properly
and give better performance out of the box.

Another short term case is the power aware interrupt routing now on recent 
Intel CPUs.  In this case the interrupt needs logical focus to multiple CPUs 
and the hardware makes the decision (essentially it does power aware load 
balancing in hardware). Again nobody else should touch it.

Then maybe this mechanism could be extended with a power aware 
software solution with some input from the load balancer like you suggested. 
I don't have a firm picture on how exactly it should work.

-Andi

-- 
ak@...ux.intel.com -- Speaking for myself only.
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