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Date:	Wed, 6 Jun 2012 11:04:15 +0200
From:	Borislav Petkov <bp@...64.org>
To:	Chen Gong <gong.chen@...ux.intel.com>
Cc:	Borislav Petkov <bp@...64.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	LKML <linux-kernel@...r.kernel.org>, tony.luck@...el.com,
	x86@...nel.org, Peter Zijlstra <peterz@...radead.org>
Subject: Re: [patch 2/2] x86: mce: Implement cmci poll mode for intel machines

On Wed, Jun 06, 2012 at 09:36:52AM +0800, Chen Gong wrote:
> Yes, I am just afraid similar situation happening when injecting MCEs
> or poll timer running too fast, which is like a pseduo CMCI storm.
> Maybe similar logic behind CMCI_STORM can be used there.

Poll timer on !Intel fires once every 5 minutes and halves the interval
when it detects a valid MCE.

I still don't think this is an issue if you poll only on single CPUs -
I think you need the throttling because, as Tony explained earlier, the
CMCI interrupt runs on _all_ CPUs and I can see how that can be hurting
performance.

CMCI on AMD (or, rather, our version of it) runs only on the CPU which
sees the error so I don't think we need throttling there, unless real
life proves me otherwise.

So, the whole CMCI deal should be Intel-only (for now, at least) and it
shouldn't be touching generic MCE code.

Thanks.

-- 
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Boris.

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